| /Linux-v5.15/tools/virtio/virtio-trace/ |
| D | trace-agent.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Guest agent for virtio-trace
15 #include "trace-agent.h"
22 "/sys/kernel/debug/tracing/per_cpu/cpu%d/trace_pipe_raw"
23 #define WRITE_PATH_FMT "/dev/virtio-ports/trace-path-cpu%d"
24 #define CTL_PATH "/dev/virtio-ports/agent-ctl-path"
34 pr_err("Could not read cpus\n"); in get_total_cpus()
58 s->pipe_size = PIPE_INIT; in agent_info_new()
59 s->use_stdout = false; in agent_info_new()
60 s->cpus = get_total_cpus(); in agent_info_new()
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| D | trace-agent-rw.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Read/write thread of a guest agent for virtio-trace
16 #include "trace-agent.h"
30 rw_ti->cpu_num = -1; in rw_thread_info_new()
31 rw_ti->in_fd = -1; in rw_thread_info_new()
32 rw_ti->out_fd = -1; in rw_thread_info_new()
33 rw_ti->read_pipe = -1; in rw_thread_info_new()
34 rw_ti->write_pipe = -1; in rw_thread_info_new()
35 rw_ti->pipe_size = PIPE_INIT; in rw_thread_info_new()
40 void *rw_thread_init(int cpu, const char *in_path, const char *out_path, in rw_thread_init() argument
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| /Linux-v5.15/include/uapi/linux/ |
| D | isst_if.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 * struct isst_if_platform_info - Define platform information
25 * @mmio_supported: Support of mmio interface for core-power feature
40 * struct isst_if_cpu_map - CPU mapping between logical and physical CPU
41 * @logical_cpu: Linux logical CPU number
42 * @physical_cpu: PUNIT CPU number
44 * Used to convert from Linux logical CPU to PUNIT CPU numbering scheme.
45 * The PUNIT CPU number is different than APIC ID based CPU numbering.
53 * struct isst_if_cpu_maps - structure for CPU map IOCTL
54 * @cmd_count: Number of CPU mapping command in cpu_map[]
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| /Linux-v5.15/Documentation/core-api/ |
| D | local_ops.rst | 29 Local atomic operations are meant to provide fast and highly reentrant per CPU
34 Having fast per CPU atomic counters is interesting in many cases: it does not
40 CPU which owns the data. Therefore, care must taken to make sure that only one
41 CPU writes to the ``local_t`` data. This is done by using per cpu data and
43 however permitted to read ``local_t`` data from any CPU: it will then appear to
44 be written out of order wrt other memory writes by the owner CPU.
54 ``asm-generic/local.h`` in your architecture's ``local.h`` is sufficient.
66 * Variables touched by local ops must be per cpu variables.
67 * *Only* the CPU owner of these variables must write to them.
68 * This CPU can use local ops from any context (process, irq, softirq, nmi, ...)
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| /Linux-v5.15/drivers/infiniband/ulp/rtrs/ |
| D | rtrs-clt-stats.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014 - 2018 ProfitBricks GmbH. All rights reserved.
6 * Copyright (c) 2018 - 2019 1&1 IONOS Cloud GmbH. All rights reserved.
7 * Copyright (c) 2019 - 2020 1&1 IONOS SE. All rights reserved.
12 #include "rtrs-clt.h"
16 struct rtrs_clt_sess *sess = to_clt_sess(con->c.sess); in rtrs_clt_update_wc_stats()
17 struct rtrs_clt_stats *stats = sess->stats; in rtrs_clt_update_wc_stats()
19 int cpu; in rtrs_clt_update_wc_stats() local
21 cpu = raw_smp_processor_id(); in rtrs_clt_update_wc_stats()
22 s = this_cpu_ptr(stats->pcpu_stats); in rtrs_clt_update_wc_stats()
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| /Linux-v5.15/tools/power/cpupower/utils/helpers/ |
| D | sysfs.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
24 if (fd == -1) in sysfs_read_file()
27 numread = read(fd, buf, buflen - 1); in sysfs_read_file()
40 * Detect whether a CPU is online
43 * 1 -> if CPU is online
44 * 0 -> if CPU is offline
47 int sysfs_is_cpu_online(unsigned int cpu) in sysfs_is_cpu_online() argument
57 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u", cpu); in sysfs_is_cpu_online()
64 * -> cpuX directory exists, but not cpuX/online file in sysfs_is_cpu_online()
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| D | msr.c | 1 // SPDX-License-Identifier: GPL-2.0
19 * Will return 0 on success and -1 on failure.
21 * EFAULT -If the read/write did not fully complete
22 * EIO -If the CPU does not support MSRs
23 * ENXIO -If the CPU does not exist
26 int read_msr(int cpu, unsigned int idx, unsigned long long *val) in read_msr() argument
31 sprintf(msr_file_name, "/dev/cpu/%d/msr", cpu); in read_msr()
34 return -1; in read_msr()
35 if (lseek(fd, idx, SEEK_CUR) == -1) in read_msr()
37 if (read(fd, val, sizeof *val) != sizeof *val) in read_msr()
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| /Linux-v5.15/arch/arm/mach-zynq/ |
| D | slcr.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011-2013 Xilinx Inc.
19 #define SLCR_A9_CPU_RST_CTRL_OFFSET 0x244 /* CPU Software Reset Control */
34 * zynq_slcr_write - Write to a register in SLCR block
47 * zynq_slcr_read - Read a register in SLCR block
49 * @val: Pointer to value to be read from SLCR
60 * zynq_slcr_unlock - Unlock SLCR registers
72 * zynq_slcr_get_device_id - Read device code id
88 * zynq_slcr_system_restart - Restart the entire system.
104 * the FSBL not loading the bitstream after soft-reboot in zynq_slcr_system_restart()
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| /Linux-v5.15/tools/memory-model/Documentation/ |
| D | explanation.txt | 1 Explanation of the Linux-Kernel Memory Consistency Model
15 7. THE PROGRAM ORDER RELATION: po AND po-loc
18 10. THE READS-FROM RELATION: rf, rfi, and rfe
20 12. THE FROM-READS RELATION: fr, fri, and fre
22 14. PROPAGATION ORDER RELATION: cumul-fence
28 20. THE HAPPENS-BEFORE RELATION: hb
29 21. THE PROPAGATES-BEFORE RELATION: pb
30 22. RCU RELATIONS: rcu-link, rcu-gp, rcu-rscsi, rcu-order, rcu-fence, and rb
38 ------------
40 The Linux-kernel memory consistency model (LKMM) is rather complex and
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| D | glossary.txt | 1 This document contains brief definitions of LKMM-related terms. Like most
2 glossaries, it is not intended to be read front to back (except perhaps
10 Address dependencies are quite common in RCU read-side critical
15 3 do_something(p->a);
18 In this case, because the address of "p->a" on line 3 is computed
21 "p->a". In rare cases, optimizing compilers can destroy address
28 using spin_lock(). With respect to a non-lock shared variable,
30 load before later memory references running on that same CPU.
40 See also "Happens-Before", "Reads-From", "Relaxed", and "Release".
42 Coherence (co): When one CPU's store to a given variable overwrites
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| /Linux-v5.15/kernel/trace/ |
| D | ring_buffer.c | 1 // SPDX-License-Identifier: GPL-2.0
27 #include <linux/cpu.h>
58 * allocated for each CPU. A writer may only write to a buffer that is
59 * associated with the CPU it is currently executing on. A reader may read
60 * from any per cpu buffer.
62 * The reader is special. For each per cpu buffer, the reader has its own
63 * reader page. When a reader has read the entire reader page, this reader
72 * +------+
75 * +------+ +---+ +---+ +---+
76 * | |-->| |-->| |
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| /Linux-v5.15/tools/power/cpupower/lib/ |
| D | cpuidle.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
22 * For example the functionality to disable c-states was introduced in later
29 unsigned int cpuidle_state_file_exists(unsigned int cpu, in cpuidle_state_file_exists() argument
37 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u/cpuidle/state%u/%s", in cpuidle_state_file_exists()
38 cpu, idlestate, fname); in cpuidle_state_file_exists()
45 * helper function to read file from /sys into given buffer
51 unsigned int cpuidle_state_read_file(unsigned int cpu, in cpuidle_state_read_file() argument
60 snprintf(path, sizeof(path), PATH_TO_CPU "cpu%u/cpuidle/state%u/%s", in cpuidle_state_read_file()
61 cpu, idlestate, fname); in cpuidle_state_read_file()
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| /Linux-v5.15/arch/mips/include/asm/sn/sn0/ |
| D | hubpi.h | 8 * Copyright (C) 1992 - 1997, 1999 Silicon Graphics, Inc.
28 #define PI_CPU_PROTECT 0x000000 /* CPU Protection */
29 #define PI_PROT_OVERRD 0x000008 /* Clear CPU Protection bit */
32 #define PI_CPU_NUM 0x000020 /* CPU Number ID */
57 #define PI_CPU_PRESENT_A 0x000040 /* CPU Present A */
58 #define PI_CPU_PRESENT_B 0x000048 /* CPU Present B */
59 #define PI_CPU_ENABLE_A 0x000050 /* CPU Enable A */
60 #define PI_CPU_ENABLE_B 0x000058 /* CPU Enable B */
63 #define PI_NMI_A 0x000070 /* NMI to CPU A */
64 #define PI_NMI_B 0x000078 /* NMI to CPU B */
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| /Linux-v5.15/tools/power/cpupower/utils/idle_monitor/ |
| D | mperf_monitor.c | 1 // SPDX-License-Identifier: GPL-2.0-only
17 #include "idle_monitor/cpupower-monitor.h"
33 unsigned int cpu);
35 unsigned int cpu);
80 /* valid flag for all CPUs. If a MSR read failed it will be zero */
93 static int get_aperf_mperf(int cpu, unsigned long long *aval, in get_aperf_mperf() argument
101 * Running on the cpu from which we read the registers will in get_aperf_mperf()
106 if (bind_cpu(cpu)) in get_aperf_mperf()
124 ret = read_msr(cpu, MSR_APERF, aval); in get_aperf_mperf()
125 ret |= read_msr(cpu, MSR_MPERF, mval); in get_aperf_mperf()
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| /Linux-v5.15/arch/ia64/kernel/ |
| D | salinfo.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (c) 2003 Hewlett-Packard Co
14 * Replace IPI with set_cpus_allowed() to read a record from the required cpu.
17 * Cache the record across multi-block reads from user space.
30 * Replace some NR_CPUS by cpus_online, for hotplug cpu.
36 * Replace the counting semaphore with a mutex and a test if the cpumask is non-empty.
41 #include <linux/cpu.h>
55 MODULE_DESCRIPTION("/proc interface to IA-64 SAL features");
97 int cpu; member
100 /* State transitions. Actions are :-
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| /Linux-v5.15/arch/x86/mm/ |
| D | cpu_entry_area.c | 1 // SPDX-License-Identifier: GPL-2.0
25 noinstr struct cpu_entry_area *get_cpu_entry_area(int cpu) in get_cpu_entry_area() argument
27 unsigned long va = CPU_ENTRY_AREA_PER_CPU + cpu * CPU_ENTRY_AREA_SIZE; in get_cpu_entry_area()
43 * non-present PTEs, so be careful not to set it in that in cea_set_pte()
56 for ( ; pages; pages--, cea_vaddr+= PAGE_SIZE, ptr += PAGE_SIZE) in cea_map_percpu_pages()
60 static void __init percpu_setup_debug_store(unsigned int cpu) in percpu_setup_debug_store() argument
69 cea = &get_cpu_entry_area(cpu)->cpu_debug_store; in percpu_setup_debug_store()
72 cea_map_percpu_pages(cea, &per_cpu(cpu_debug_store, cpu), npages, in percpu_setup_debug_store()
75 cea = &get_cpu_entry_area(cpu)->cpu_debug_buffers; in percpu_setup_debug_store()
77 * Force the population of PMDs for not yet allocated per cpu in percpu_setup_debug_store()
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| /Linux-v5.15/drivers/platform/x86/intel/ |
| D | uncore-frequency.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Provide interface to set MSR 620 at a granularity of per die. On CPU online,
8 * one control CPU is identified per die to read/write limit. This control CPU
9 * is changed, if the CPU state is changed to offline. When the last CPU is
11 * The majority of actual code is related to sysfs create and read/write
17 #include <linux/cpu.h>
22 #include <asm/intel-family.h>
28 * struct uncore_data - Encapsulate all uncore data
33 * @control_cpu: Designated CPU for a die to read/write
57 /* Stores the CPU mask of the target CPUs to use during uncore read/write */
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| D | turbo_max_3.c | 1 // SPDX-License-Identifier: GPL-2.0
19 #include <asm/intel-family.h>
30 * system. So for most of the time, the first mailbox read should have the
35 static int get_oc_core_priority(unsigned int cpu) in get_oc_core_priority() argument
40 /* Issue favored core read command */ in get_oc_core_priority()
46 pr_debug("cpu %d OC mailbox write failed\n", cpu); in get_oc_core_priority()
53 pr_debug("cpu %d OC mailbox read failed\n", cpu); in get_oc_core_priority()
58 pr_debug("cpu %d OC mailbox still processing\n", cpu); in get_oc_core_priority()
59 ret = -EBUSY; in get_oc_core_priority()
64 pr_debug("cpu %d OC mailbox cmd failed\n", cpu); in get_oc_core_priority()
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| /Linux-v5.15/Documentation/ |
| D | memory-barriers.txt | 19 documentation at tools/memory-model/. Nevertheless, even this memory
37 Note also that it is possible that a barrier may be a no-op for an
48 - Device operations.
49 - Guarantees.
53 - Varieties of memory barrier.
54 - What may not be assumed about memory barriers?
55 - Data dependency barriers (historical).
56 - Control dependencies.
57 - SMP barrier pairing.
58 - Examples of memory barrier sequences.
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| /Linux-v5.15/include/clocksource/ |
| D | hyperv_timer.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Definitions for the clocksource provided by the Hyper-V
5 * hypervisor to guest VMs, as described in the Hyper-V Top
27 extern int hv_stimer_cleanup(unsigned int cpu);
28 extern void hv_stimer_legacy_init(unsigned int cpu, int sint);
29 extern void hv_stimer_legacy_cleanup(unsigned int cpu);
44 * The protocol for reading Hyper-V TSC page is specified in Hypervisor in hv_read_tsc_page_tsc()
45 * Top-Level Functional Specification ver. 3.0 and above. To get the in hv_read_tsc_page_tsc()
47 * - READ ReferenceTscSequence in hv_read_tsc_page_tsc()
50 * versions (up to 4.0b) contain a mistake and wrongly claim '-1' in hv_read_tsc_page_tsc()
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| /Linux-v5.15/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_coherency.c | 2 * SPDX-License-Identifier: MIT
28 u32 *cpu; in cpu_set() local
31 i915_gem_object_lock(ctx->obj, NULL); in cpu_set()
32 err = i915_gem_object_prepare_write(ctx->obj, &needs_clflush); in cpu_set()
36 page = i915_gem_object_get_page(ctx->obj, offset >> PAGE_SHIFT); in cpu_set()
38 cpu = map + offset_in_page(offset); in cpu_set()
41 drm_clflush_virt_range(cpu, sizeof(*cpu)); in cpu_set()
43 *cpu = v; in cpu_set()
46 drm_clflush_virt_range(cpu, sizeof(*cpu)); in cpu_set()
49 i915_gem_object_finish_access(ctx->obj); in cpu_set()
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| /Linux-v5.15/Documentation/RCU/Design/Requirements/ |
| D | Requirements.rst | 16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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| /Linux-v5.15/Documentation/vm/ |
| D | mmu_notifier.rst | 10 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
11 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
25 - take page table lock
26 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
27 - set page table entry to point to new page
35 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
40 [Time N] --------------------------------------------------------------------
41 CPU-thread-0 {try to write to addrA}
42 CPU-thread-1 {try to write to addrB}
43 CPU-thread-2 {}
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| /Linux-v5.15/arch/arm64/kernel/ |
| D | smp_spin_table.c | 1 // SPDX-License-Identifier: GPL-2.0-only
22 volatile unsigned long __section(".mmuoff.data.read")
43 static int smp_spin_table_cpu_init(unsigned int cpu) in smp_spin_table_cpu_init() argument
48 dn = of_get_cpu_node(cpu, NULL); in smp_spin_table_cpu_init()
50 return -ENODEV; in smp_spin_table_cpu_init()
53 * Determine the address from which the CPU is polling. in smp_spin_table_cpu_init()
55 ret = of_property_read_u64(dn, "cpu-release-addr", in smp_spin_table_cpu_init()
56 &cpu_release_addr[cpu]); in smp_spin_table_cpu_init()
58 pr_err("CPU %d: missing or invalid cpu-release-addr property\n", in smp_spin_table_cpu_init()
59 cpu); in smp_spin_table_cpu_init()
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| /Linux-v5.15/Documentation/hwmon/ |
| D | smsc47m192.rst | 10 Addresses scanned: I2C 0x2c - 0x2d
23 - Hartmut Rick <linux@rick.claranet.de>
25 - Special thanks to Jean Delvare for careful checking
30 -----------
33 of the SMSC LPC47M192 and compatible Super-I/O chips.
36 as well as CPU voltage VID input.
42 Voltages and temperatures are measured by an 8-bit ADC, the resolution
52 bit 4 of the encoded CPU voltage. This means that you either get
53 a +12V voltage measurement or a 5 bit CPU VID, but not both.
64 ---------------
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