Home
last modified time | relevance | path

Searched +full:cpu +full:- +full:crit (Results 1 – 25 of 98) sorted by relevance

1234

/Linux-v6.1/Documentation/devicetree/bindings/thermal/
Dbrcm,sr-thermal.txt6 - compatible : Must be "brcm,sr-thermal"
7 - reg : Memory where tmon data will be available.
8 - brcm,tmon-mask: A one cell bit mask of valid TMON sources.
10 - #thermal-sensor-cells : Thermal sensor phandler
11 - polling-delay: Max number of milliseconds to wait between polls.
12 - thermal-sensors: A list of thermal sensor phandles and specifier.
14 in correspond with brcm,tmon-mask.
15 - temperature: trip temperature threshold in millicelsius.
19 compatible = "simple-bus";
20 #address-cells = <1>;
[all …]
Dbrcm,bcm2835-thermal.txt4 -------------------
6 compatible: should be one of: "brcm,bcm2835-thermal",
7 "brcm,bcm2836-thermal" or "brcm,bcm2837-thermal"
10 #thermal-sensor-cells: should be 0 (see Documentation/devicetree/bindings/thermal/thermal-sensor.ya…
14 thermal-zones {
15 cpu_thermal: cpu-thermal {
16 polling-delay-passive = <0>;
17 polling-delay = <1000>;
19 thermal-sensors = <&thermal>;
22 cpu-crit {
[all …]
Dst,stm32-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pascal Paillet <p.paillet@foss.st.com>
14 const: st,stm32-thermal
25 clock-names:
27 - const: pclk
29 "#thermal-sensor-cells":
33 - "#thermal-sensor-cells"
[all …]
Dbrcm,ns-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
16 - $ref: thermal-sensor.yaml#
20 const: brcm,ns-thermal
26 "#thermal-sensor-cells":
32 - reg
35 - |
[all …]
Drzg2l-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/rzg2l-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Biju Das <biju.das.jz@bp.renesas.com>
19 - enum:
20 - renesas,r9a07g043-tsu # RZ/G2UL
21 - renesas,r9a07g044-tsu # RZ/G2{L,LC}
22 - renesas,r9a07g054-tsu # RZ/V2L
23 - const: renesas,rzg2l-tsu
[all …]
Drcar-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
5 $id: http://devicetree.org/schemas/thermal/rcar-thermal.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Thermal
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
16 - items:
17 - enum:
18 - renesas,thermal-r8a73a4 # R-Mobile APE6
19 - renesas,thermal-r8a7779 # R-Car H1
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
[all …]
Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
16 gpio-keys {
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&power_key>;
21 power-key {
32 debounce-interval = <0>;
[all …]
Dexynos5420-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 polling-delay-passive = <0>;
9 polling-delay = <0>;
11 cpu-alert-0 {
16 cpu-alert-1 {
21 cpu-alert-2 {
26 cpu-crit-0 {
Dexynos4-cpu-thermal.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/thermal/thermal.h>
11 thermal-zones {
12 cpu_thermal: cpu-thermal {
13 thermal-sensors = <&tmu 0>;
14 polling-delay-passive = <0>;
15 polling-delay = <0>;
17 cpu_alert0: cpu-alert-0 {
22 cpu_alert1: cpu-alert-1 {
27 cpu_alert2: cpu-alert-2 {
[all …]
Dexynos5420-arndale-octa.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/clock/samsung,s2mps11.h>
19 compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
27 stdout-path = "serial3:115200n8";
31 compatible = "samsung,secure-firmware";
[all …]
Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
45 cpu@0 {
46 device_type = "cpu";
47 compatible = "arm,cortex-a72";
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/power/qcom-rpmpd.h>
8 #include <dt-bindings/thermal/thermal.h>
11 interrupt-parent = <&intc>;
13 #address-cells = <2>;
14 #size-cells = <2>;
19 sleep_clk: sleep-clk {
[all …]
Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/mailbox/qcom-ipcc.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/exynos/
Dexynos7-trip-points.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 cpu-alert-0 {
15 cpu-alert-1 {
20 cpu-alert-2 {
25 cpu-alert-3 {
30 cpu-alert-4 {
35 cpu-alert-5 {
40 cpu-alert-6 {
45 cpu-crit-0 {
/Linux-v6.1/arch/powerpc/include/asm/
Dpaca.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 #include <asm/exception-64e.h>
24 #include <asm/exception-64s.h>
35 #include <asm-generic/mmiowb_types.h>
51 #define get_lppaca() (get_paca()->lppaca_ptr)
54 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
70 * read-only (after boot) fields in the first cacheline to
95 u64 data_offset; /* per cpu data offset */
98 /* this becomes non-zero. */
107 u64 dscr_default; /* per-CPU default DSCR */
[all …]
/Linux-v6.1/arch/powerpc/kvm/
Dbook3s.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Kevin Wolf <mail@kevin-wolf.de>
101 if (is_kvmppc_hv_enabled(vcpu->kvm)) in kvmppc_update_int_pending()
113 bool crit; in kvmppc_critical_section() local
115 if (is_kvmppc_hv_enabled(vcpu->kvm)) in kvmppc_critical_section()
121 /* Truncate crit indicators in 32 bit mode */ in kvmppc_critical_section()
127 /* Critical section when crit == r1 */ in kvmppc_critical_section()
128 crit = (crit_raw == crit_r1); in kvmppc_critical_section()
130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); in kvmppc_critical_section()
132 return crit; in kvmppc_critical_section()
[all …]
Dbooke.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, in kvmppc_dump_vcpu()
95 vcpu->arch.shared->msr); in kvmppc_dump_vcpu()
96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, in kvmppc_dump_vcpu()
97 vcpu->arch.regs.ctr); in kvmppc_dump_vcpu()
98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, in kvmppc_dump_vcpu()
99 vcpu->arch.shared->srr1); in kvmppc_dump_vcpu()
101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); in kvmppc_dump_vcpu()
119 vcpu->arch.shadow_msr &= ~MSR_SPE; in kvmppc_vcpu_disable_spe()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
31 cpu: cpus { label
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr8a779f0.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779f0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
21 cpu-map {
[all …]

1234