counts (full) in projects: Linux-v6.1 - OpenGrok search results

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/Linux-v6.1/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
D	other.json	3 "PublicDescription": "This event counts the occurrence count of the micro-operation split.", 6 "BriefDescription": "This event counts the occurrence count of the micro-operation split." 9 …"PublicDescription": "This event counts every cycle that no operation was committed because the ol… 12 …"BriefDescription": "This event counts every cycle that no operation was committed because the old… 15 …"PublicDescription": "This event counts every cycle that no instruction was committed because the … 18 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o… 21 …"PublicDescription": "This event counts every cycle that no instruction was committed because the … 24 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o… 27 …"PublicDescription": "This event counts every cycle that no instruction was committed because the … 30 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o… [all …]
D	pipeline.json	9 "PublicDescription": "This event counts valid cycles of EAGA pipeline.", 12 "BriefDescription": "This event counts valid cycles of EAGA pipeline." 15 "PublicDescription": "This event counts valid cycles of EAGB pipeline.", 18 "BriefDescription": "This event counts valid cycles of EAGB pipeline." 21 "PublicDescription": "This event counts valid cycles of EXA pipeline.", 24 "BriefDescription": "This event counts valid cycles of EXA pipeline." 27 "PublicDescription": "This event counts valid cycles of EXB pipeline.", 30 "BriefDescription": "This event counts valid cycles of EXB pipeline." 33 "PublicDescription": "This event counts valid cycles of FLA pipeline.", 36 "BriefDescription": "This event counts valid cycles of FLA pipeline." [all …]
D	cache.json	45 …"PublicDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch.", 48 … "BriefDescription": "This event counts L1D_CACHE_REFILL caused by software or hardware prefetch." 51 …"PublicDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch.", 54 … "BriefDescription": "This event counts L2D_CACHE_REFILL caused by software or hardware prefetch." 57 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by demand access.", 60 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by demand access." 63 "PublicDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch.", 66 "BriefDescription": "This event counts L1D_CACHE_REFILL caused by hardware prefetch." 69 "PublicDescription": "This event counts outstanding L1D cache miss requests per cycle.", 72 "BriefDescription": "This event counts outstanding L1D cache miss requests per cycle." [all …]
D	bus.json	3 … "PublicDescription": "This event counts read transactions from tofu controller to measured CMG.", 6 "BriefDescription": "This event counts read transactions from tofu controller to measured CMG." 9 "PublicDescription": "This event counts read transactions from PCI controller to measured CMG.", 12 "BriefDescription": "This event counts read transactions from PCI controller to measured CMG." 15 …"PublicDescription": "This event counts read transactions from measured CMG local memory to measur… 18 …"BriefDescription": "This event counts read transactions from measured CMG local memory to measure… 21 …"PublicDescription": "This event counts write transactions from measured CMG to CMG0, if measured … 24 …"BriefDescription": "This event counts write transactions from measured CMG to CMG0, if measured C… 27 …"PublicDescription": "This event counts write transactions from measured CMG to CMG1, if measured … 30 …"BriefDescription": "This event counts write transactions from measured CMG to CMG1, if measured C… [all …]
D	instruction.json	66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t… 69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th… 72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.", 75 "BriefDescription": "This event counts architecturally executed floating-point move operations." 78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r… 81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re… 84 …"PublicDescription": "This event counts architecturally executed inter-element manipulation operat… 87 …"BriefDescription": "This event counts architecturally executed inter-element manipulation operati… 90 …"PublicDescription": "This event counts architecturally executed inter-register manipulation opera… 93 …"BriefDescription": "This event counts architecturally executed inter-register manipulation operat… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/broadwell/
D	cache.json	8 …"PublicDescription": "This event counts L1D data line replacements including opportunistic replace… 28 …"PublicDescription": "This event counts duration of L1D miss outstanding, that is each cycle numbe… 39 "PublicDescription": "This event counts duration of L1D miss outstanding in cycles.", 60 "PublicDescription": "This event counts the number of WB requests that hit L2 cache.", 70 …"PublicDescription": "This event counts the number of L2 cache lines filling the L2. Counting does… 80 …"PublicDescription": "This event counts the number of L2 cache lines in the Exclusive state fillin… 90 …"PublicDescription": "This event counts the number of L2 cache lines in the Invalidate state filli… 100 …"PublicDescription": "This event counts the number of L2 cache lines in the Shared state filling t… 119 "PublicDescription": "This event counts the total number of L2 code requests.", 129 …"PublicDescription": "This event counts the number of demand Data Read requests (including request… [all …]
D	memory.json	84 "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 89 …"PublicDescription": "This event counts the number of memory ordering Machine Clears detected. Mem… 104 "PublicDescription": "Counts randomly selected loads with latency value being above 128.", 120 "PublicDescription": "Counts randomly selected loads with latency value being above 16.", 136 "PublicDescription": "Counts randomly selected loads with latency value being above 256.", 152 "PublicDescription": "Counts randomly selected loads with latency value being above 32.", 168 "PublicDescription": "Counts randomly selected loads with latency value being above four.", 184 "PublicDescription": "Counts randomly selected loads with latency value being above 512.", 200 "PublicDescription": "Counts randomly selected loads with latency value being above 64.", 216 "PublicDescription": "Counts randomly selected loads with latency value being above eight.", [all …]
/Linux-v6.1/tools/perf/util/
D	counts.c	6 #include "counts.h" 12 struct perf_counts counts = zalloc(sizeof(counts)); in perf_counts__new() local 14 if (counts) { in perf_counts__new() 19 free(counts); in perf_counts__new() 23 counts->values = values; in perf_counts__new() 27 xyarray__delete(counts->values); in perf_counts__new() 28 free(counts); in perf_counts__new() 32 counts->loaded = values; in perf_counts__new() 35 return counts; in perf_counts__new() 38 void perf_counts__delete(struct perf_counts *counts) in perf_counts__delete() argument [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/knightslanding/
D	pipeline.json	3 "BriefDescription": "Counts the number of branch instructions retired", 11 "BriefDescription": "Counts the number of near CALL branch instructions retired.", 20 "BriefDescription": "Counts the number of far branch instructions retired.", 29 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.", 38 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps.… 47 …"BriefDescription": "Counts the number of branch instructions retired that were near indirect CALL… 56 "BriefDescription": "Counts the number of near relative CALL branch instructions retired.", 65 "BriefDescription": "Counts the number of near RET branch instructions retired.", 74 …"BriefDescription": "Counts the number of branch instructions retired that were conditional jumps … 83 "BriefDescription": "Counts the number of mispredicted branch instructions retired", [all …]
D	memory.json	3 …"BriefDescription": "Counts the number of times the machine clears due to memory ordering hazards", 11 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for r… 22 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for d… 33 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for d… 44 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for r… 55 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for d… 66 …"BriefDescription": "Counts Demand code reads and prefetch code read requests that accounts for d… 77 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 88 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… 99 …"BriefDescription": "Counts Demand cacheable data and L1 prefetch data read requests that account… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
D	branch.json	18 …anch executed. This event counts when any branch that the conditional predictor can predict is ret… 21 …anch executed. This event counts when any branch that the conditional predictor can predict is ret… 24 …counts when any indirect branch that the Branch Target Address Cache (BTAC) can predict is retired… 27 …counts when any indirect branch that the Branch Target Address Cache (BTAC) can predict is retired… 30 …counts when any indirect branch that the BTAC can predict is retired, was taken, correctly predict… 33 …counts when any indirect branch that the BTAC can predict is retired, was taken, correctly predict… 36 …s event counts when any branch that the conditional predictor can predict is retired and has mispr… 39 …s event counts when any branch that the conditional predictor can predict is retired and has mispr… 42 …vent counts when any indirect branch that the BTAC can predict is retired, was taken, and correctl… 45 …vent counts when any indirect branch that the BTAC can predict is retired, was taken, and correctl… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
D	branch.json	18 … executed.This event counts when any branch which can be predicted by the conditional predictor is… 21 … executed.This event counts when any branch which can be predicted by the conditional predictor is… 24 …counts when any indirect branch which can be predicted by the BTAC is retired, and has mispredicte… 27 …counts when any indirect branch which can be predicted by the BTAC is retired, and has mispredicte… 30 …counts when any indirect branch which can be predicted by the BTAC is retired, was taken and corre… 33 …counts when any indirect branch which can be predicted by the BTAC is retired, was taken and corre… 36 …nt counts when any branch which can be predicted by the conditional predictor is retired, and has … 39 …nt counts when any branch which can be predicted by the conditional predictor is retired, and has … 42 … counts when any indirect branch which can be predicted by the BTAC is retired, was taken and corr… 45 … counts when any indirect branch which can be predicted by the BTAC is retired, was taken and corr… [all …]
/Linux-v6.1/tools/lib/perf/tests/
D	test-evsel.c	40 struct perf_counts_values counts = { .val = 0 }; in test_stat_cpu() local 42 perf_evsel__read(evsel, idx, 0, &counts); in test_stat_cpu() 43 __T("failed to read value for evsel", counts.val != 0); in test_stat_cpu() 55 struct perf_counts_values counts = { .val = 0 }; in test_stat_thread() local 75 perf_evsel__read(evsel, 0, 0, &counts); in test_stat_thread() 76 __T("failed to read value for evsel", counts.val != 0); in test_stat_thread() 87 struct perf_counts_values counts = { .val = 0 }; in test_stat_thread_enable() local 108 perf_evsel__read(evsel, 0, 0, &counts); in test_stat_thread_enable() 109 __T("failed to read value for evsel", counts.val == 0); in test_stat_thread_enable() 114 perf_evsel__read(evsel, 0, 0, &counts); in test_stat_thread_enable() [all …]
/Linux-v6.1/drivers/net/ethernet/freescale/dpaa2/
D	dpmac.h	129 * @DPMAC_CNT_ING_FRAME_64: counts 64-bytes frames, good or bad. 130 * @DPMAC_CNT_ING_FRAME_127: counts 65- to 127-bytes frames, good or bad. 131 * @DPMAC_CNT_ING_FRAME_255: counts 128- to 255-bytes frames, good or bad. 132 * @DPMAC_CNT_ING_FRAME_511: counts 256- to 511-bytes frames, good or bad. 133 * @DPMAC_CNT_ING_FRAME_1023: counts 512- to 1023-bytes frames, good or bad. 134 * @DPMAC_CNT_ING_FRAME_1518: counts 1024- to 1518-bytes frames, good or bad. 135 * @DPMAC_CNT_ING_FRAME_1519_MAX: counts 1519-bytes frames and larger 138 * @DPMAC_CNT_ING_FRAG: counts frames which are shorter than 64 bytes received 140 * @DPMAC_CNT_ING_JABBER: counts frames longer than the maximum frame length 142 * @DPMAC_CNT_ING_FRAME_DISCARD: counts dropped frames due to internal errors. [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/goldmont/
D	cache.json	8 …Counts the number of demand and L1 prefetcher requests rejected by the L2Q due to a full or nearly… 17 …"PublicDescription": "Counts when a modified (dirty) cache line is evicted from the data L1 cache … 27 …"PublicDescription": "Counts cycles that fetch is stalled due to an outstanding ICache miss. That … 37 …"PublicDescription": "Counts the number of demand and prefetch transactions that the L2 XQ rejects… 46 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.", 56 …"PublicDescription": "Counts memory requests originating from the core that reference a cache line… 68 …"PublicDescription": "Counts memory load uops retired where the data is retrieved from DRAM. Even… 80 …"PublicDescription": "Counts load uops retired where the cache line containing the data was in the… 92 "PublicDescription": "Counts load uops retired that hit the L1 data cache.", 104 "PublicDescription": "Counts load uops retired that miss the L1 data cache.", [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/elkhartlake/
D	cache.json	3 …"BriefDescription": "Counts the number of core requests (demand and L1 prefetchers) rejected by th… 10 …Counts the number of (demand and L1 prefetchers) core requests rejected by the L2 queue (L2Q) due … 14 …"BriefDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, s… 21 …"PublicDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, … 26 …"BriefDescription": "Counts the number of demand and prefetch transactions that the External Queue… 33 …"PublicDescription": "Counts the number of demand and prefetch transactions that the External Queu… 37 … "BriefDescription": "Counts the total number of L2 Cache accesses. Counts on a per core basis.", 44 …: "Counts the total number of L2 Cache Accesses, includes hits, misses, rejects front door reques… 48 …"BriefDescription": "Counts the number of L2 Cache accesses that resulted in a hit. Counts on a pe… 55 …ion": "Counts the number of L2 Cache accesses that resulted in a hit from a front door request onl… [all …]
D	pipeline.json	3 …"BriefDescription": "Counts the total number of branch instructions retired for all branch types.", 10 …"PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP… 14 "BriefDescription": "Counts the number of near CALL branch instructions retired.", 25 …"BriefDescription": "Counts the number of far branch instructions retired, includes far jump, far … 36 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.", 47 …"BriefDescription": "Counts the number of retired JCC (Jump on Conditional Code) branch instructio… 58 …"BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instruct… 69 "BriefDescription": "Counts the number of near relative CALL branch instructions retired.", 80 "BriefDescription": "Counts the number of near RET branch instructions retired.", 91 …"BriefDescription": "Counts the number of taken JCC (Jump on Conditional Code) branch instructions… [all …]
D	virtual-memory.json	3 …"BriefDescription": "Counts the number of page walks due to loads that miss the PDE (Page Director… 14 …"BriefDescription": "Counts the number of first level TLB misses but second level hits due to a de… 25 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page… 31 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 36 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 1G pag… 43 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 48 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 2M or … 55 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 60 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K pag… 67 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/snowridgex/
D	cache.json	3 …"BriefDescription": "Counts the number of core requests (demand and L1 prefetchers) rejected by th… 10 …Counts the number of (demand and L1 prefetchers) core requests rejected by the L2 queue (L2Q) due … 14 …"BriefDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, s… 21 …"PublicDescription": "Counts the number of L1D cacheline (dirty) evictions caused by load misses, … 26 …"BriefDescription": "Counts the number of demand and prefetch transactions that the External Queue… 33 …"PublicDescription": "Counts the number of demand and prefetch transactions that the External Queu… 37 … "BriefDescription": "Counts the total number of L2 Cache accesses. Counts on a per core basis.", 44 …: "Counts the total number of L2 Cache Accesses, includes hits, misses, rejects front door reques… 48 …"BriefDescription": "Counts the number of L2 Cache accesses that resulted in a hit. Counts on a pe… 55 …ion": "Counts the number of L2 Cache accesses that resulted in a hit from a front door request onl… [all …]
D	pipeline.json	3 …"BriefDescription": "Counts the total number of branch instructions retired for all branch types.", 10 …"PublicDescription": "Counts the total number of instructions in which the instruction pointer (IP… 14 "BriefDescription": "Counts the number of near CALL branch instructions retired.", 25 …"BriefDescription": "Counts the number of far branch instructions retired, includes far jump, far … 36 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired.", 47 …"BriefDescription": "Counts the number of retired JCC (Jump on Conditional Code) branch instructio… 58 …"BriefDescription": "Counts the number of near indirect JMP and near indirect CALL branch instruct… 69 "BriefDescription": "Counts the number of near relative CALL branch instructions retired.", 80 "BriefDescription": "Counts the number of near RET branch instructions retired.", 91 …"BriefDescription": "Counts the number of taken JCC (Jump on Conditional Code) branch instructions… [all …]
D	virtual-memory.json	3 …"BriefDescription": "Counts the number of page walks due to loads that miss the PDE (Page Director… 14 …"BriefDescription": "Counts the number of first level TLB misses but second level hits due to a de… 25 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to any page… 31 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 36 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 1G pag… 43 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 48 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 2M or … 55 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… 60 …"BriefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K pag… 67 …"PublicDescription": "Counts the number of page walks completed due to loads (including SW prefetc… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/silvermont/
D	cache.json	3 …"BriefDescription": "Counts the number of request that were not accepted into the L2Q because the … 7 …Counts the number of (demand and L1 prefetchers) core requests rejected by the L2Q due to a full o… 15 …"PublicDescription": "Counts cycles that fetch is stalled due to an outstanding ICache miss. That … 20 … "BriefDescription": "Counts the number of request from the L2 that were not accepted into the XQ", 24 …"PublicDescription": "This event counts the number of demand and prefetch transactions that the L2… 32 …"PublicDescription": "This event counts the total number of L2 cache references and the number of … 41 …"PublicDescription": "This event counts requests originating from the core that references a cache… 50 "PublicDescription": "This event counts the number of load ops retired.", 59 "PublicDescription": "This event counts the number of store ops retired.", 69 …"PublicDescription": "This event counts the number of load ops retired that got data from the othe… [all …]
D	pipeline.json	3 "BriefDescription": "Counts the number of branch instructions retired...", 8 …"PublicDescription": "ALL_BRANCHES counts the number of any branch instructions retired. Branch p… 12 "BriefDescription": "Counts the number of taken branch instructions retired", 18 …"PublicDescription": "ALL_TAKEN_BRANCHES counts the number of all taken branch instructions retire… 23 "BriefDescription": "Counts the number of near CALL branch instructions retired", 28 …"PublicDescription": "CALL counts the number of near CALL branch instructions retired. Branch pre… 33 "BriefDescription": "Counts the number of far branch instructions retired", 38 …"PublicDescription": "FAR counts the number of far branch instructions retired. Branch prediction… 43 "BriefDescription": "Counts the number of near indirect CALL branch instructions retired", 48 …"PublicDescription": "IND_CALL counts the number of near indirect CALL branch instructions retired… [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/goldmontplus/
D	cache.json	10 …Counts the number of demand and L1 prefetcher requests rejected by the L2Q due to a full or nearly… 21 …"PublicDescription": "Counts when a modified (dirty) cache line is evicted from the data L1 cache … 33 …"PublicDescription": "Counts cycles that fetch is stalled due to an outstanding ICache miss. That … 45 …"PublicDescription": "Counts the number of demand and prefetch transactions that the L2 XQ rejects… 56 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.", 68 …"PublicDescription": "Counts memory requests originating from the core that reference a cache line… 81 …"PublicDescription": "Counts memory load uops retired where the data is retrieved from DRAM. Even… 94 …"PublicDescription": "Counts load uops retired where the cache line containing the data was in the… 107 "PublicDescription": "Counts load uops retired that hit the L1 data cache.", 120 "PublicDescription": "Counts load uops retired that miss the L1 data cache.", [all …]
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/
D	cache.json	3 "PublicDescription": "This event counts any instruction fetch which misses in the cache.", 7 …"PublicDescription": "This event counts any refill of the instruction L1 TLB from the L2 TLB. This… 11 …"PublicDescription": "This event counts any load or store operation or page table walk access whic… 15 …"PublicDescription": "This event counts any load or store operation or page table walk access whic… 19 …"PublicDescription": "This event counts any refill of the data L1 TLB from the L2 TLB. This includ… 23 … 1 instruction cache access or Level 0 Macro-op cache access. This event counts any instruction fe… 27 …"PublicDescription": "This event counts any write-back of data from the L1 data cache to L2 or L3.… 31 …"PublicDescription": "This event counts any transaction from L1 which looks up in the L2 cache, an… 35 …"PublicDescription": "L2 data cache refill. This event counts any cacheable transaction from L1 wh… 39 …"PublicDescription": "This event counts any write-back of data from the L2 cache to outside the co… [all …]

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