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/Linux-v5.15/Documentation/virt/
Dparavirt_ops.rst24 These operations correspond to high level functionality where it is
28 Usually these operations correspond to low level critical instructions. They
/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-bus-iio-light-lm3533-als32 These thresholds correspond to the eight zone-boundary
52 These values correspond to the ALS-mapper target registers for
/Linux-v5.15/drivers/media/platform/sti/delta/
Ddelta-mjpeg-fw.h207 * ceh_registers[0] correspond to register MBE_CEH_0_7,
208 * ceh_registers[1] correspond to register MBE_CEH_8_15
209 * ceh_registers[2] correspond to register MBE_CEH_16_23
/Linux-v5.15/Documentation/devicetree/bindings/serial/
Dpl011.yaml54 When present, the first clock listed must correspond to
57 must correspond to the PCLK clocking the internal logic
/Linux-v5.15/include/uapi/linux/
Dstat.h174 * Note that the flags marked [I] correspond to the FS_IOC_SETFLAGS flags
175 * semantically. Where possible, the numerical value is picked to correspond
177 * direct access state. It does not correspond to the per-inode flag that
/Linux-v5.15/tools/include/uapi/linux/
Dstat.h174 * Note that the flags marked [I] correspond to the FS_IOC_SETFLAGS flags
175 * semantically. Where possible, the numerical value is picked to correspond
177 * direct access state. It does not correspond to the per-inode flag that
/Linux-v5.15/arch/mips/kernel/
Dcmpxchg.c24 * Calculate a shift & mask that correspond to the value we wish to in __xchg_small()
66 * Calculate a shift & mask that correspond to the value we wish to in __cmpxchg_small()
/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra194-pinmux.txt60 These correspond to Tegra PADCTL_* (pinmux) registers.
64 These correspond to Tegra PADCTL_* (pinmux) registers. Any property
/Linux-v5.15/Documentation/driver-api/rapidio/
Dtsi721.rst26 This parameter can be changed bit masks that correspond to the specific
60 correspond to MBOX0 - MBOX3. MBOX is under driver's control if the
/Linux-v5.15/Documentation/devicetree/bindings/display/imx/
Dfsl-imx-drm.txt40 Ports 0 and 1 should correspond to CSI0 and CSI1,
41 ports 2 and 3 should correspond to DI0 and DI1, respectively.
/Linux-v5.15/drivers/staging/fwserial/
Dfwserial.h206 * bits 15..0 correspond to TIOCM_* bits
210 * bits 31..24 correspond to UART_LSR_* bits
213 * bits 15..0 correspond to TIOCM_* bits
/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dsirf-audio-port.txt8 These strings correspond 1:1 with the ordered pairs in dmas.
Dbrcm,bcm2835-i2s.txt9 These strings correspond 1:1 with the ordered pairs in dmas.
Dsprd-pcm.txt7 These strings correspond 1:1 with the ordered pairs in dmas.
/Linux-v5.15/arch/arc/include/asm/
Ddsp.h15 * structure fields name must correspond to aux register defenitions for
/Linux-v5.15/Documentation/devicetree/bindings/crypto/
Dbrcm,spu-crypto.txt15 Mailbox channels correspond to DMA rings on the device.
/Linux-v5.15/tools/testing/selftests/drivers/net/mlxsw/
Dsch_red_root.sh55 # Note that the backlog value here does not correspond to RED
/Linux-v5.15/drivers/comedi/drivers/
Dssv_dnp.c28 /* 4 to 7 correspond to pin 0..3 for port C data register. Ensure that bits */
52 * correspond to bits 4...7 of the output register (PCDR). in dnp_dio_insn_bits()
/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Ddavinci_mmc.txt19 - dma-names: RX and TX DMA request names. These strings correspond
/Linux-v5.15/arch/powerpc/perf/
Dhv-24x7-domains.h20 * Note: The terms PHYS_CHIP, PHYS_CORE, VCPU correspond to physical chip,
/Linux-v5.15/Documentation/devicetree/bindings/gpio/
Dwd,mbl-gpio.txt12 order must correspond with the order of entries in reg-names
Dni,169445-nand-gpio.txt12 order must correspond with the order of entries in reg-names
/Linux-v5.15/include/dt-bindings/clock/
Dmarvell,pxa1928.h6 * Clock ID values here correspond to the control register offset/4.
/Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic-timer.txt16 interrupts that correspond to available timers shall be present.
/Linux-v5.15/Documentation/power/powercap/
Dpowercap.rst14 'control types', which correspond to different methods of power capping. For
176 correspond to the jth constraint (j = 0,1,2).

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