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Searched +full:corei2c +full:- +full:rtl +full:- +full:v7 (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/i2c/
Dmicrochip,corei2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daire McNamara <daire.mcnamara@microchip.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - items:
19 - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
20 - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
21 - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
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/Linux-v6.1/arch/riscv/boot/dts/microchip/
Dmpfs-icicle-kit-fabric.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
5 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
9 compatible = "microchip,corepwm-rtl-v4";
11 microchip,sync-update-mask = /bits/ 32 <0>;
12 #pwm-cells = <2>;
18 compatible = "microchip,corei2c-rtl-v7";
20 #address-cells = <1>;
21 #size-cells = <0>;
23 interrupt-parent = <&plic>;
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Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
20 i-cache-block-size = <64>;
21 i-cache-sets = <128>;
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/Linux-v6.1/drivers/i2c/busses/
Di2c-microchip-corei2c.c1 // SPDX-License-Identifier: GPL-2.0
3 * Microchip CoreI2C I2C controller driver
5 * Copyright (c) 2018-2022 Microchip Corporation. All rights reserved.
91 * struct mchp_corei2c_dev - Microchip CoreI2C device private data
121 u8 ctrl = readb(idev->base + CORE_I2C_CTRL); in mchp_corei2c_core_disable()
124 writeb(ctrl, idev->base + CORE_I2C_CTRL); in mchp_corei2c_core_disable()
129 u8 ctrl = readb(idev->base + CORE_I2C_CTRL); in mchp_corei2c_core_enable()
132 writeb(ctrl, idev->base + CORE_I2C_CTRL); in mchp_corei2c_core_enable()
143 u8 ctrl = readb(idev->base + CORE_I2C_CTRL); in mchp_corei2c_stop()
146 writeb(ctrl, idev->base + CORE_I2C_CTRL); in mchp_corei2c_stop()
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