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/Linux-v5.4/Documentation/devicetree/bindings/arm/
Drockchip.yaml14 const: '/'
20 - const: vamrs,ficus
21 - const: rockchip,rk3399
25 - const: vamrs,rock960
26 - const: rockchip,rk3399
30 - const: amarula,vyasa-rk3288
31 - const: rockchip,rk3288
35 - const: asus,rk3288-tinker
36 - const: rockchip,rk3288
40 - const: asus,rk3288-tinker-s
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Dsunxi.yaml15 const: '/'
21 - const: allwinner,sun8i-a23-evb
22 - const: allwinner,sun8i-a23
26 - const: allwinner,app4-evb1
27 - const: allwinner,sun6i-a31
31 - const: allwinner,h8homlet-v2
32 - const: allwinner,sun8i-a83t
36 - const: allwinner,ga10h-v1.1
37 - const: allwinner,sun8i-a33
41 - const: allwinner,gt90h-v4
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/Linux-v5.4/drivers/pinctrl/
Dpinctrl-bm1880.c35 const struct bm1880_pctrl_group *groups;
37 const struct bm1880_pinmux_function *funcs;
39 const struct bm1880_pinconf_data *pinconf;
49 const char *name;
50 const unsigned int *pins;
51 const unsigned int npins;
64 const char *name;
65 const char * const *groups;
80 static const struct pinctrl_pin_desc bm1880_pins[] = {
218 static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
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Dpinctrl-zynq.c44 const struct zynq_pctrl_group *groups;
46 const struct zynq_pinmux_function *funcs;
51 const char *name;
52 const unsigned int *pins;
53 const unsigned int npins;
67 const char *name;
68 const char * const *groups;
116 static const struct pinctrl_pin_desc zynq_pins[] = {
178 static const unsigned int ethernet0_0_pins[] = {16, 17, 18, 19, 20, 21, 22, 23,
180 static const unsigned int ethernet1_0_pins[] = {28, 29, 30, 31, 32, 33, 34, 35,
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/Linux-v5.4/drivers/pinctrl/qcom/
Dpinctrl-msm8996.c85 static const struct pinctrl_pin_desc msm8996_pins[] = {
246 static const unsigned int gpio##pin##_pins[] = { pin }
398 static const unsigned int sdc1_clk_pins[] = { 150 };
399 static const unsigned int sdc1_cmd_pins[] = { 151 };
400 static const unsigned int sdc1_data_pins[] = { 152 };
401 static const unsigned int sdc2_clk_pins[] = { 153 };
402 static const unsigned int sdc2_cmd_pins[] = { 154 };
403 static const unsigned int sdc2_data_pins[] = { 155 };
404 static const unsigned int sdc1_rclk_pins[] = { 156 };
653 static const char * const gpio_groups[] = {
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Dpinctrl-sdm660.c14 static const char * const sdm660_tiles[] = {
102 static const struct pinctrl_pin_desc sdm660_pins[] = {
227 static const unsigned int gpio##pin##_pins[] = { pin }
343 static const unsigned int sdc1_clk_pins[] = { 114 };
344 static const unsigned int sdc1_cmd_pins[] = { 115 };
345 static const unsigned int sdc1_data_pins[] = { 116 };
346 static const unsigned int sdc1_rclk_pins[] = { 120 };
347 static const unsigned int sdc2_clk_pins[] = { 117 };
348 static const unsigned int sdc2_cmd_pins[] = { 118 };
349 static const unsigned int sdc2_data_pins[] = { 119 };
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Dpinctrl-ipq8074.c59 static const struct pinctrl_pin_desc ipq8074_pins[] = {
133 static const unsigned int gpio##pin##_pins[] = { pin }
321 static const char * const qpic_groups[] = {
342 static const char * const blsp5_i2c_groups[] = {
346 static const char * const blsp5_spi_groups[] = {
350 static const char * const wci2a_groups[] = {
354 static const char * const blsp3_spi3_groups[] = {
358 static const char * const burn0_groups[] = {
362 static const char * const pcm_zsi0_groups[] = {
366 static const char * const blsp5_uart_groups[] = {
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Dpinctrl-qcs404.c13 static const char * const qcs404_tiles[] = {
98 static const struct pinctrl_pin_desc qcs404_pins[] = {
229 static const unsigned int gpio##pin##_pins[] = { pin }
351 static const unsigned int sdc1_rclk_pins[] = { 120 };
352 static const unsigned int sdc1_clk_pins[] = { 121 };
353 static const unsigned int sdc1_cmd_pins[] = { 122 };
354 static const unsigned int sdc1_data_pins[] = { 123 };
355 static const unsigned int sdc2_clk_pins[] = { 124 };
356 static const unsigned int sdc2_cmd_pins[] = { 125 };
357 static const unsigned int sdc2_data_pins[] = { 126 };
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Dpinctrl-msm8998.c113 static const struct pinctrl_pin_desc msm8998_pins[] = {
271 static const unsigned int gpio##pin##_pins[] = { pin }
423 static const unsigned int sdc2_clk_pins[] = { 150 };
424 static const unsigned int sdc2_cmd_pins[] = { 151 };
425 static const unsigned int sdc2_data_pins[] = { 152 };
426 static const unsigned int ufs_reset_pins[] = { 153 };
608 static const char * const gpio_groups[] = {
633 static const char * const blsp_spi1_groups[] = {
636 static const char * const blsp_uim1_a_groups[] = {
639 static const char * const blsp_uart1_a_groups[] = {
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Dpinctrl-msm8916.c13 static const struct pinctrl_pin_desc msm8916_pins[] = {
151 static const unsigned int gpio##pin##_pins[] = { pin }
276 static const unsigned int sdc1_clk_pins[] = { 122 };
277 static const unsigned int sdc1_cmd_pins[] = { 123 };
278 static const unsigned int sdc1_data_pins[] = { 124 };
279 static const unsigned int sdc2_clk_pins[] = { 125 };
280 static const unsigned int sdc2_cmd_pins[] = { 126 };
281 static const unsigned int sdc2_data_pins[] = { 127 };
282 static const unsigned int qdsd_clk_pins[] = { 128 };
283 static const unsigned int qdsd_cmd_pins[] = { 129 };
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/Linux-v5.4/drivers/pinctrl/meson/
Dpinctrl-meson-g12a.c14 static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
102 static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
121 static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
122 static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
123 static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
124 static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
125 static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
126 static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
127 static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
128 static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
[all …]
Dpinctrl-meson-axg.c14 static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
103 static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
122 static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
123 static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
124 static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
125 static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
126 static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
127 static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
128 static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
129 static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
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Dpinctrl-meson8b.c13 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
131 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
132 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
133 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
134 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
135 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
138 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
140 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
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Dpinctrl-meson8.c12 static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
135 static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
155 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
156 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
157 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
158 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
159 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
160 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
162 static const unsigned int sdxc_d0_a_pins[] = { GPIOX_0 };
163 static const unsigned int sdxc_d13_a_pins[] = { GPIOX_1, GPIOX_2, GPIOX_3 };
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Dpinctrl-meson-gxl.c13 static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {
122 static const unsigned int emmc_nand_d07_pins[] = {
125 static const unsigned int emmc_clk_pins[] = { BOOT_8 };
126 static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
127 static const unsigned int emmc_ds_pins[] = { BOOT_15 };
129 static const unsigned int nor_d_pins[] = { BOOT_11 };
130 static const unsigned int nor_q_pins[] = { BOOT_12 };
131 static const unsigned int nor_c_pins[] = { BOOT_13 };
132 static const unsigned int nor_cs_pins[] = { BOOT_15 };
134 static const unsigned int spi_mosi_pins[] = { GPIOX_8 };
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Dpinctrl-meson-gxbb.c13 static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = {
142 static const unsigned int emmc_nand_d07_pins[] = {
145 static const unsigned int emmc_clk_pins[] = { BOOT_8 };
146 static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
147 static const unsigned int emmc_ds_pins[] = { BOOT_15 };
149 static const unsigned int nor_d_pins[] = { BOOT_11 };
150 static const unsigned int nor_q_pins[] = { BOOT_12 };
151 static const unsigned int nor_c_pins[] = { BOOT_13 };
152 static const unsigned int nor_cs_pins[] = { BOOT_15 };
154 static const unsigned int spi_sclk_pins[] = { GPIOZ_6 };
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/Linux-v5.4/fs/cifs/
Dcifsproto.h80 extern char *cifs_compose_mount_options(const char *sb_mountdata,
81 const char *fullpath, const struct dfs_info3_param *ref,
84 extern struct mid_q_entry *AllocMidQEntry(const struct smb_hdr *smb_buffer,
96 mid_handle_t *handle, void *cbdata, const int flags,
97 const struct cifs_credits *exist_credits);
98 extern int cifs_send_recv(const unsigned int xid, struct cifs_ses *ses,
100 const int flags, struct kvec *resp_iov);
101 extern int compound_send_recv(const unsigned int xid, struct cifs_ses *ses,
102 const int flags, const int num_rqst,
105 extern int SendReceive(const unsigned int /* xid */ , struct cifs_ses *,
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/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxgf100.h30 const struct gf100_gr_pack *hub;
31 const struct gf100_gr_pack *gpc_0;
32 const struct gf100_gr_pack *gpc_1;
33 const struct gf100_gr_pack *zcull;
34 const struct gf100_gr_pack *tpc;
35 const struct gf100_gr_pack *ppc;
37 const struct gf100_gr_pack *icmd;
38 const struct gf100_gr_pack *mthd;
39 const struct gf100_gr_pack *sw_veid_bundle_init;
81 extern const struct gf100_grctx_func gf100_grctx;
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/Linux-v5.4/drivers/clk/at91/
Dpmc.h42 extern const struct clk_master_layout at91rm9200_master_layout;
43 extern const struct clk_master_layout at91sam9x5_master_layout;
57 extern const struct clk_pll_layout at91rm9200_pll_layout;
58 extern const struct clk_pll_layout at91sam9g45_pll_layout;
59 extern const struct clk_pll_layout at91sam9g20_pllb_layout;
60 extern const struct clk_pll_layout sama5d3_pll_layout;
65 const struct clk_range *output;
79 extern const struct clk_programmable_layout at91rm9200_programmable_layout;
80 extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
81 extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
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/Linux-v5.4/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dchannv50.h10 const struct nv50_disp_chan_func *func;
11 const struct nv50_disp_chan_mthd *mthd;
34 int nv50_disp_chan_new_(const struct nv50_disp_chan_func *,
35 const struct nv50_disp_chan_mthd *,
37 const struct nvkm_oclass *, struct nvkm_object **);
38 int nv50_disp_dmac_new_(const struct nv50_disp_chan_func *,
39 const struct nv50_disp_chan_mthd *,
41 const struct nvkm_oclass *, struct nvkm_object **);
45 extern const struct nv50_disp_chan_func nv50_disp_pioc_func;
46 extern const struct nv50_disp_chan_func nv50_disp_dmac_func;
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/Linux-v5.4/drivers/video/fbdev/sis/
Dvstruct.h349 const struct SiS_St *SiS_SModeIDTable;
350 const struct SiS_StandTable_S *SiS_StandTable;
351 const struct SiS_Ext *SiS_EModeIDTable;
352 const struct SiS_Ext2 *SiS_RefIndex;
353 const struct SiS_VBMode *SiS_VBModeIDTable;
354 const struct SiS_CRT1Table *SiS_CRT1Table;
355 const struct SiS_MCLKData *SiS_MCLKData_0;
356 const struct SiS_MCLKData *SiS_MCLKData_1;
359 const struct SiS_StResInfo_S *SiS_StResInfo;
360 const struct SiS_ModeResInfo_S *SiS_ModeResInfo;
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/Linux-v5.4/include/linux/
Dproperty.h36 bool device_property_present(struct device *dev, const char *propname);
37 int device_property_read_u8_array(struct device *dev, const char *propname,
39 int device_property_read_u16_array(struct device *dev, const char *propname,
41 int device_property_read_u32_array(struct device *dev, const char *propname,
43 int device_property_read_u64_array(struct device *dev, const char *propname,
45 int device_property_read_string_array(struct device *dev, const char *propname,
46 const char **val, size_t nval);
47 int device_property_read_string(struct device *dev, const char *propname,
48 const char **val);
50 const char *propname, const char *string);
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Dsiphash.h24 static inline bool siphash_key_is_zero(const siphash_key_t *key) in siphash_key_is_zero()
29 u64 __siphash_aligned(const void *data, size_t len, const siphash_key_t *key);
31 u64 __siphash_unaligned(const void *data, size_t len, const siphash_key_t *key);
34 u64 siphash_1u64(const u64 a, const siphash_key_t *key);
35 u64 siphash_2u64(const u64 a, const u64 b, const siphash_key_t *key);
36 u64 siphash_3u64(const u64 a, const u64 b, const u64 c,
37 const siphash_key_t *key);
38 u64 siphash_4u64(const u64 a, const u64 b, const u64 c, const u64 d,
39 const siphash_key_t *key);
40 u64 siphash_1u32(const u32 a, const siphash_key_t *key);
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/Linux-v5.4/drivers/pinctrl/sirf/
Dpinctrl-prima2.c18 static const struct pinctrl_pin_desc sirfsoc_pads[] = {
134 static const struct sirfsoc_muxmask lcd_16bits_sirfsoc_muxmask[] = {
147 static const struct sirfsoc_padmux lcd_16bits_padmux = {
155 static const unsigned lcd_16bits_pins[] = { 95, 96, 97, 98, 99, 100, 101, 102,
158 static const struct sirfsoc_muxmask lcd_18bits_muxmask[] = {
174 static const struct sirfsoc_padmux lcd_18bits_padmux = {
182 static const unsigned lcd_18bits_pins[] = { 16, 17, 95, 96, 97, 98, 99, 100,
185 static const struct sirfsoc_muxmask lcd_24bits_muxmask[] = {
202 static const struct sirfsoc_padmux lcd_24bits_padmux = {
210 static const unsigned lcd_24bits_pins[] = { 16, 17, 18, 19, 20, 21, 22, 23,
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/Linux-v5.4/drivers/net/wireless/intel/iwlwifi/
Diwl-config.h275 const u8 regulatory_bands[7];
351 const struct iwl_base_params *base_params;
352 const struct iwl_csr_params *csr;
422 const char *name;
423 const char *fw_name_pre;
425 const struct iwl_ht_params *ht_params;
426 const struct iwl_eeprom_params *eeprom_params;
427 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
428 const char *default_nvm_file_C_step;
429 const struct iwl_tt_params *thermal_params;
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