Searched full:coherently (Results 1 – 13 of 13) sorted by relevance
20 coherently attached to a CPU via an MMU. This driver enables
19 OpenCAPI allows FPGA and ASIC accelerators to be coherently
23 @ We probe for the active serial port here, coherently with
57 /* Mask of CPUs which are currently definitely operating coherently */
18 be coherently processed by the host(s) in the system. A maximum
40 The POWER8/9 chip has a Coherently Attached Processor Proxy (CAPP)45 The FPGA (or coherently attached device) consists of two parts.
10 the host memory coherently, using virtual addresses. An OpenCAPI
286 * memory coherently. We default to pgprot_noncached which is usually used
195 * dma_lock spinlock guarantees this handover is done coherently, the in zynq_step_dma()
13 allowing a device to transparently access program addresses coherently with
651 * In the legacy case, ensure our coherently-allocated virtio in virtio_mmio_probe()
16 and undocumented fashion, making it hard to coherently explain.
1241 * enabled to make sure hardware sees them coherently. in msc_buffer_relink()
