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/Linux-v6.6/Documentation/devicetree/bindings/mfd/
Dsamsung,exynos5433-lpass.yaml68 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
79 clocks = <&cmu_aud CLK_ACLK_DMAC>;
95 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
96 <&cmu_aud CLK_SCLK_AUD_I2S>,
97 <&cmu_aud CLK_SCLK_I2S_BCLK>;
110 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
111 <&cmu_aud CLK_SCLK_AUD_UART>;
/Linux-v6.6/arch/arm64/boot/dts/exynos/
Dexynos5433-tm2-common.dtsi225 &cmu_aud {
226 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
227 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
228 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
235 <&cmu_aud CLK_DIV_AUD_CA5>,
236 <&cmu_aud CLK_DIV_ACLK_AUD>,
237 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
238 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
239 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
240 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
[all …]
Dexynos5433.dtsi482 cmu_aud: clock-controller@114c0000 { label
1882 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
1893 clocks = <&cmu_aud CLK_ACLK_DMAC>;
1907 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
1908 <&cmu_aud CLK_SCLK_AUD_I2S>,
1909 <&cmu_aud CLK_SCLK_I2S_BCLK>;
1923 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
1924 <&cmu_aud CLK_SCLK_AUD_UART>;
Dexynos850.dtsi348 cmu_aud: clock-controller@14a00000 { label
555 clocks = <&cmu_aud CLK_GOUT_AUD_SYSMMU_CLK>;
/Linux-v6.6/include/dt-bindings/clock/
Dexynos850.h118 /* CMU_AUD */
Dexynos5260-clk.h207 /* List Of Clocks For CMU_AUD */
Dexynos5433.h760 /* CMU_AUD */
/Linux-v6.6/drivers/clk/samsung/
Dclk-exynos5260.h13 *Registers for CMU_AUD
Dclk-exynos850.c223 /* List of parent clocks for Muxes in CMU_TOP: for CMU_AUD */
647 /* ---- CMU_AUD ------------------------------------------------------------- */
761 /* List of parent clocks for Muxes in CMU_AUD */
Dclk-exynos7.c1229 /* Register Offset definitions for CMU_AUD (0x114C0000) */
1238 * List of parent clocks for Muxes in CMU_AUD
Dclk-exynos5260.c91 /* CMU_AUD */
Dclk-exynos5433.c2922 * Register offset definitions for CMU_AUD