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/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dsamsung,exynos5433-lpass.yaml68 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
79 clocks = <&cmu_aud CLK_ACLK_DMAC>;
95 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
96 <&cmu_aud CLK_SCLK_AUD_I2S>,
97 <&cmu_aud CLK_SCLK_I2S_BCLK>;
110 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
111 <&cmu_aud CLK_SCLK_AUD_UART>;
/Linux-v6.1/arch/arm64/boot/dts/exynos/
Dexynos5433-tm2-common.dtsi219 &cmu_aud {
220 assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
221 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
222 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
229 <&cmu_aud CLK_DIV_AUD_CA5>,
230 <&cmu_aud CLK_DIV_ACLK_AUD>,
231 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
232 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
233 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
234 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
[all …]
Dexynos5433.dtsi486 cmu_aud: clock-controller@114c0000 { label
1883 clocks = <&cmu_aud CLK_PCLK_SFR0_CTRL>;
1894 clocks = <&cmu_aud CLK_ACLK_DMAC>;
1908 clocks = <&cmu_aud CLK_PCLK_AUD_I2S>,
1909 <&cmu_aud CLK_SCLK_AUD_I2S>,
1910 <&cmu_aud CLK_SCLK_I2S_BCLK>;
1924 clocks = <&cmu_aud CLK_PCLK_AUD_UART>,
1925 <&cmu_aud CLK_SCLK_AUD_UART>;
Dexynos850.dtsi340 cmu_aud: clock-controller@14a00000 { label
547 clocks = <&cmu_aud CLK_GOUT_AUD_SYSMMU_CLK>;
/Linux-v6.1/include/dt-bindings/clock/
Dexynos850.h117 /* CMU_AUD */
Dexynos5260-clk.h217 /* List Of Clocks For CMU_AUD */
Dexynos5433.h776 /* CMU_AUD */
/Linux-v6.1/drivers/clk/samsung/
Dclk-exynos5260.h13 *Registers for CMU_AUD
Dclk-exynos850.c205 /* List of parent clocks for Muxes in CMU_TOP: for CMU_AUD */
614 /* ---- CMU_AUD ------------------------------------------------------------- */
726 /* List of parent clocks for Muxes in CMU_AUD */
Dclk-exynos7.c1229 /* Register Offset definitions for CMU_AUD (0x114C0000) */
1238 * List of parent clocks for Muxes in CMU_AUD
Dclk-exynos5260.c76 /* CMU_AUD */
Dclk-exynos5433.c2899 * Register offset definitions for CMU_AUD