Searched +full:clocking +full:- +full:wizard (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: "http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#"5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"7 title: Xilinx clocking wizard10 - Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>13 The clocking wizard is a soft ip clocking block of Xilinx versal. It20 - xlnx,clocking-wizard21 - xlnx,clocking-wizard-v5.222 - xlnx,clocking-wizard-v6.0[all …]
1 # SPDX-License-Identifier: GPL-2.021 tristate "Xilinx Clocking Wizard"25 Support for the Xilinx Clocking Wizard IP core clock generator.26 Adds support for clocking wizard and compatible.27 This driver supports the Xilinx clocking wizard programmable clock
1 // SPDX-License-Identifier: GPL-2.03 * Xilinx 'Clocking Wizard' driver5 * Copyright (C) 2013 - 2021 Xilinx13 #include <linux/clk-provider.h>53 #define div_mask(width) ((1 << (width)) - 1)66 * struct clk_wzrd - Clock wizard private data structure91 * struct clk_wzrd_divider - clock divider specific to clk_wzrd93 * @hw: handle between common and hardware-specific interfaces129 void __iomem *div_addr = divider->base + divider->offset; in clk_wzrd_recalc_rate()132 val = readl(div_addr) >> divider->shift; in clk_wzrd_recalc_rate()[all …]
