Searched +full:clock +full:- +full:specifier (Results 1 – 25 of 309) sorted by relevance
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| /Linux-v5.15/Documentation/devicetree/bindings/clock/ |
| D | clock-bindings.txt | 1 This binding is a work-in-progress, and are based on some experimental
4 Sources of clock signal can be represented by any node in the device
5 tree. Those nodes are designated as clock providers. Clock consumer
6 nodes use a phandle and clock specifier pair to connect clock provider
7 outputs to clock inputs. Similar to the gpio specifiers, a clock
8 specifier is an array of zero, one or more cells identifying the clock
9 output on a device. The length of a clock specifier is defined by the
10 value of a #clock-cells property in the clock provider node.
14 ==Clock providers==
17 #clock-cells: Number of cells in a clock specifier; Typically 0 for nodes
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| D | brcm,kona-ccu.txt | 4 clock control units (CCUs). A CCU is a clock provider that manages
5 a set of clock signals. Each CCU is represented by a node in the
8 This binding uses the common clock binding:
9 Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - compatible
13 Shall have a value of the form "brcm,<model>-<which>-ccu",
16 "brcm,bcm11351-root-ccu"
19 - reg
21 containing clock control registers
22 - #clock-cells
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| D | renesas,rzg2l-cpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas RZ/G2L Clock Pulse Generator / Module Standby Mode
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas RZ/G2L SoC, the CPG (Clock Pulse Generator) and Module
17 - The CPG block generates various core clocks,
18 - The Module Standby Mode block provides two functions:
19 1. Module Standby, providing a Clock Domain to control the clock supply
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| D | moxa,moxart-clock.txt | 1 Device Tree Clock bindings for arch-moxart
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
14 - compatible : Must be "moxa,moxart-pll-clock"
15 - #clock-cells : Should be 0
16 - reg : Should contain registers location and length
17 - clocks : Should contain phandle + clock-specifier for the parent clock
20 - clock-output-names : Should contain clock name
26 - compatible : Must be "moxa,moxart-apb-clock"
27 - #clock-cells : Should be 0
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| D | renesas,cpg-mssr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas Clock Pulse Generator / Module Standby and Software Reset
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
18 - The CPG block generates various core clocks,
19 - The MSSR block provides two functions:
20 1. Module Standby, providing a Clock Domain to control the clock supply
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| /Linux-v5.15/Documentation/devicetree/bindings/display/imx/ |
| D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
23 const: nxp,imx8mq-dcss
27 - description: DCSS base address and size, up to IRQ steer start
28 - description: DCSS BLKCTL base address and size
32 - description: Context loader completion and error interrupt
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| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | nokia-bluetooth.txt | 2 ---------------------
13 - compatible: should contain "nokia,h4p-bluetooth" as well as one of the following:
14 * "brcm,bcm2048-nokia"
15 * "ti,wl1271-bluetooth-nokia"
16 - reset-gpios: GPIO specifier, used to reset the BT module (active low)
17 - bluetooth-wakeup-gpios: GPIO specifier, used to wakeup the BT module (active high)
18 - host-wakeup-gpios: GPIO specifier, used to wakeup the host processor (active high)
19 - clock-names: should be "sysclk"
20 - clocks: should contain a clock specifier for every name in clock-names
24 - None
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| D | broadcom-bluetooth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/broadcom-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - brcm,bcm20702a1
19 - brcm,bcm4329-bt
20 - brcm,bcm4330-bt
21 - brcm,bcm4334-bt
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| /Linux-v5.15/Documentation/devicetree/bindings/usb/ |
| D | hisilicon,histb-xhci.txt | 6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
12 "bus": for bus clock
13 "utmi": for utmi clock
14 "pipe": for pipe clock
15 "suspend": for suspend clock
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| D | msm-hsusb.txt | 6 - compatible: Should contain "qcom,ehci-host"
7 - regs: offset and length of the register set in the memory map
8 - usb-phy: phandle for the PHY device
13 compatible = "qcom,ehci-host";
15 usb-phy = <&usb_otg>;
21 - compatible: Should contain:
22 "qcom,usb-otg-ci" for chipsets with ChipIdea 45nm PHY
23 "qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY
25 - regs: Offset and length of the register set in the memory map
26 - interrupts: interrupt-specifier for the OTG interrupt.
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| /Linux-v5.15/Documentation/devicetree/bindings/pci/ |
| D | hisilicon-histb-pcie.txt | 6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-typec.txt | 1 * ROCKCHIP type-c PHY
2 ---------------------
5 - compatible : must be "rockchip,rk3399-typec-phy"
6 - reg: Address and length of the usb phy control register set
7 - rockchip,grf : phandle to the syscon managing the "general
9 - clocks : phandle + clock specifier for the phy clocks
10 - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref";
11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
14 - resets : a list of phandle + reset specifier pairs
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| D | qcom-pcie2-phy.txt | 8 - compatible: compatible list, should be:
9 "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"
11 - reg: offset and length of the PHY register set.
12 - #phy-cells: must be 0.
14 - clocks: a clock-specifier pair for the "pipe" clock
16 - vdda-vp-supply: phandle to low voltage regulator
17 - vdda-vph-supply: phandle to high voltage regulator
19 - resets: reset-specifier pairs for the "phy" and "pipe" resets
20 - reset-names: list of resets, should contain:
23 - clock-output-names: name of the outgoing clock signal from the PHY PLL
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| D | phy-rockchip-inno-hdmi.txt | 4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
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| /Linux-v5.15/Documentation/devicetree/bindings/ata/ |
| D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
5 When using "mediatek,mtk-ahci" compatible strings, you
7 - "mediatek,mt7622-ahci"
8 - reg : Physical base addresses and length of register sets.
9 - interrupts : Interrupt associated with the SATA device.
10 - interrupt-names : Associated name must be: "hostc".
11 - clocks : A list of phandle and clock specifier pairs, one for each
12 entry in clock-names.
13 - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
14 - phys : A phandle and PHY specifier pair for the PHY port.
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| D | ahci-dm816.txt | 2 ---------------------------------------------------------
5 - compatible: must be "ti,dm816-ahci"
6 - reg: physical base address and size of the register region used by
8 - interrupts: interrupt specifier (refer to the interrupt binding)
9 - clocks: list of phandle and clock specifier pairs (or only
10 phandles for clock providers with '0' defined for
11 #clock-cells); two clocks must be specified: the functional
12 clock and an external reference clock
17 compatible = "ti,dm816-ahci";
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| /Linux-v5.15/Documentation/devicetree/bindings/media/ |
| D | hix5hd2-ir.txt | 1 Device-Tree bindings for hix5hd2 ir IP
4 - compatible: Should contain "hisilicon,hix5hd2-ir", or:
5 - "hisilicon,hi3796cv300-ir" for Hi3796CV300 IR device.
6 - reg: Base physical address of the controller and length of memory
8 - interrupts: interrupt-specifier for the sole interrupt generated by
9 the device. The interrupt specifier format depends on the interrupt
11 - clocks: clock phandle and specifier pair.
14 - linux,rc-map-name: see rc.txt file in the same directory.
15 - hisilicon,power-syscon: DEPRECATED. Don't use this in new dts files.
21 compatible = "hisilicon,hix5hd2-ir";
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| D | samsung-s5c73m3.txt | 2 ------------------------------
4 The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656) video
11 ---------------------
15 - compatible : "samsung,s5c73m3";
16 - reg : I2C slave address of the sensor;
17 - vdd-int-supply : digital power supply (1.2V);
18 - vdda-supply : analog power supply (1.2V);
19 - vdd-reg-supply : regulator input power supply (2.8V);
20 - vddio-host-supply : host I/O power supply (1.8V to 2.8V);
21 - vddio-cis-supply : CIS I/O power supply (1.2V to 1.8V);
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| D | samsung-s5k6a3.txt | 2 ---------------------------------
4 S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces
9 - compatible : "samsung,s5k6a3";
10 - reg : I2C slave address of the sensor;
11 - svdda-supply : core voltage supply;
12 - svddio-supply : I/O voltage supply;
13 - afvdd-supply : AF (actuator) voltage supply;
14 - gpios : specifier of a GPIO connected to the RESET pin;
15 - clocks : should contain list of phandle and clock specifier pairs
16 according to common clock bindings for the clocks described
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| /Linux-v5.15/Documentation/devicetree/bindings/hsi/ |
| D | omap-ssi.txt | 9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
19 "ssi_ssr_fck": The OMAP clock of that name
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| /Linux-v5.15/Documentation/devicetree/bindings/sound/ |
| D | adi,axi-spdif-tx.txt | 1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 The controller expects two clocks, the clock used for the AXI interface and
8 the clock used as the sampling rate reference clock sample.
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
10 rate reference clock.
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
13 - dma-names : Must be "tx"
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| D | designware-i2s.txt | 4 - compatible : Must be "snps,designware-i2s"
5 - reg : Must contain the I2S core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's
7 clocks. The controller expects one clock: the clock used as the sampling
8 rate reference clock sample.
9 - clock-names : "i2sclk" for the sample rate reference clock.
10 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
13 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
16 - interrupts: The interrupt line number for the I2S controller. Add this
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'
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| D | adi,axi-i2s.txt | 1 ADI AXI-I2S controller
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 The controller expects two clocks, the clock used for the AXI interface and
11 the clock used as the sampling rate reference clock sample.
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
13 rate reference clock.
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
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| /Linux-v5.15/Documentation/devicetree/bindings/arm/ |
| D | sp810.txt | 2 -----------------------
6 - compatible: standard compatible string for a Primecell peripheral,
11 - reg: standard registers property, physical address and size
14 - clock-names: from the common clock bindings, for more details see
15 Documentation/devicetree/bindings/clock/clock-bindings.txt;
18 - clocks: from the common clock bindings, phandle and clock
19 specifier pairs for the entries of clock-names property
21 - #clock-cells: from the common clock bindings;
24 - clock-output-names: from the common clock bindings;
27 - assigned-clocks: from the common clock binding;
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| /Linux-v5.15/Documentation/devicetree/bindings/dma/ |
| D | sprd-dma.txt | 6 - compatible: Should be "sprd,sc9860-dma".
7 - reg: Should contain DMA registers location and length.
8 - interrupts: Should contain one interrupt shared by all channel.
9 - #dma-cells: must be <1>. Used to represent the number of integer
11 - #dma-channels : Number of DMA channels supported. Should be 32.
12 - clock-names: Should contain the clock of the DMA controller.
13 - clocks: Should contain a clock specifier for each entry in clock-names.
18 apdma: dma-controller@20100000 {
19 compatible = "sprd,sc9860-dma";
22 #dma-cells = <1>;
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