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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dimx7d-clock.yaml40 - const: ckil
63 clocks = <&ckil>, <&osc>;
64 clock-names = "ckil", "osc";
Dimx6sll-clock.yaml39 - const: ckil
65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6ul-clock.yaml39 - const: ckil
65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6sx-clock.yaml41 - const: ckil
69 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
70 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
Dimx8m-clock.yaml72 - const: ckil
119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
Dclock-bindings.txt39 clock-output-names = "ckil", "ckih";
43 "ckil" and the second named "ckih". Consumer nodes always reference
Dimx6q-clock.yaml41 - const: ckil
Dimx31-clock.yaml21 ckil 2
/Linux-v5.10/drivers/clk/imx/
Dclk-imx31.c40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
68 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx31_clocks_init()
Dclk-imx27.c39 "ckil", "fpm", "ckih_gate", "ckih_gate",
69 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); in _mx27_clocks_init()
70 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); in _mx27_clocks_init()
Dclk-imx35.c80 /* 81 */ gpu2d_gate, ckil, clk_max enumerator
116 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx35_clocks_init()
Dclk-imx5.c101 "ipg", "per_root", "ckil", "dummy",};
158 clk[IMX5_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0); in mx5_clocks_common_init()
Dclk-imx6ul.c64 "dummy", "lcdif_pix", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
129 hws[IMX6UL_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil"); in imx6ul_clocks_init()
Dclk-imx8mq.c271 "sys3_pll_out", "audio_pll1_out", "video_pll1_out", "ckil", };
300 hws[IMX8MQ_CLK_32K] = imx_obtain_fixed_clk_hw(np, "ckil"); in imx8mq_clocks_probe()
/Linux-v5.10/drivers/rtc/
Drtc-mxc_v2.c49 * To take care of the asynchronous CKIL clock, all writes from the IP domain
50 * will be synchronized to the CKIL domain.
57 /* Wait for 3 CKIL cycles */ in mxc_rtc_sync_lp_locked()
Drtc-snvs.c108 /* Wait for 3 CKIL cycles, about 61.0-91.5 µs */ in rtc_write_sync_lp()
/Linux-v5.10/arch/arm/boot/dts/
Dimx6sll.dtsi80 ckil: clock-ckil { label
84 clock-output-names = "ckil";
492 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
493 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx50.dtsi64 ckil {
65 compatible = "fsl,imx-ckil", "fixed-clock";
Dimx6sx.dtsi95 ckil: clock-ckil { label
99 clock-output-names = "ckil";
603 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
604 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
Dimx6ul.dtsi106 ckil: clock-cli { label
110 clock-output-names = "ckil";
571 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
572 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx7s.dtsi80 ckil: clock-cki { label
84 clock-output-names = "ckil";
623 clocks = <&ckil>, <&osc>;
624 clock-names = "ckil", "osc";
Dimx51.dtsi50 ckil {
51 compatible = "fsl,imx-ckil", "fixed-clock";
Dimx53.dtsi88 ckil {
89 compatible = "fsl,imx-ckil", "fixed-clock";
Dimx6qdl.dtsi53 ckil {
54 compatible = "fsl,imx-ckil", "fixed-clock";
/Linux-v5.10/arch/arm64/boot/dts/freescale/
Dimx8mq.dtsi44 ckil: clock-ckil { label
48 clock-output-names = "ckil";
601 clocks = <&ckil>, <&osc_25m>, <&osc_27m>,
604 clock-names = "ckil", "osc_25m", "osc_27m",

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