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/Linux-v5.4/drivers/visorbus/
Dvisorchannel.c8 * This provides s-Par channel communication primitives, which are
9 * independent of the mechanism used to access the channel data.
36 * channel creator knows if more than one thread will be inserting or
48 void visorchannel_destroy(struct visorchannel *channel) in visorchannel_destroy() argument
50 if (!channel) in visorchannel_destroy()
53 if (channel->mapped) { in visorchannel_destroy()
54 memunmap(channel->mapped); in visorchannel_destroy()
55 if (channel->requested) in visorchannel_destroy()
56 release_mem_region(channel->physaddr, channel->nbytes); in visorchannel_destroy()
58 kfree(channel); in visorchannel_destroy()
[all …]
/Linux-v5.4/drivers/rpmsg/
Dqcom_smd.c30 * Each channel consists of a control item (channel info) and a ring buffer
31 * pair. The channel info carry information related to channel state, flow
37 * Upon creating a new channel the remote processor allocates channel info and
39 * interrupt is sent to the other end of the channel and a scan for new
40 * channels should be done. A channel never goes away, it will only change
44 * channel by setting the state of its end of the channel to "opening" and
46 * consume the channel. Upon finding a consumer we finish the handshake and the
47 * channel is up.
49 * Upon closing a channel, the remote processor will update the state of its
50 * end of the channel and signal us, we will then unregister any attached
[all …]
Dqcom_glink_native.c63 * @in_use: To mark if intent is already in use for the channel
82 * @mbox_chan: mailbox channel
91 * @lcids: idr of all channels with a known local channel id
92 * @rcids: idr of all channels with a known remote channel id
131 * struct glink_channel - internal representation of a channel
133 * @ept: rpmsg endpoint this channel is associated with
135 * @refcount: refcount for the channel object
137 * @name: unique channel name/identifier
138 * @lcid: channel id, in local space
139 * @rcid: channel id, in remote space
[all …]
/Linux-v5.4/drivers/char/xillybus/
Dxillybus_core.c113 "Malformed message (skipping): opcode=%d, channel=%03x, dir=%d, bufno=%03x, data=%07x\n", in malformed_message()
131 struct xilly_channel *channel; in xillybus_isr() local
191 channel = ep->channels[msg_channel]; in xillybus_isr()
193 if (msg_dir) { /* Write channel */ in xillybus_isr()
194 if (msg_bufno >= channel->num_wr_buffers) { in xillybus_isr()
198 spin_lock(&channel->wr_spinlock); in xillybus_isr()
199 channel->wr_buffers[msg_bufno]->end_offset = in xillybus_isr()
201 channel->wr_fpga_buf_idx = msg_bufno; in xillybus_isr()
202 channel->wr_empty = 0; in xillybus_isr()
203 channel->wr_sleepy = 0; in xillybus_isr()
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/Linux-v5.4/drivers/staging/greybus/
Dlight.c69 static void gb_lights_channel_free(struct gb_channel *channel);
71 static struct gb_connection *get_conn_from_channel(struct gb_channel *channel) in get_conn_from_channel() argument
73 return channel->light->glights->connection; in get_conn_from_channel()
81 static bool is_channel_flash(struct gb_channel *channel) in is_channel_flash() argument
83 return !!(channel->mode & (GB_CHANNEL_MODE_FLASH | GB_CHANNEL_MODE_TORCH in is_channel_flash()
95 static struct led_classdev *get_channel_cdev(struct gb_channel *channel) in get_channel_cdev() argument
97 return &channel->fled.led_cdev; in get_channel_cdev()
103 struct gb_channel *channel = NULL; in get_channel_from_mode() local
107 channel = &light->channels[i]; in get_channel_from_mode()
108 if (channel && channel->mode == mode) in get_channel_from_mode()
[all …]
/Linux-v5.4/drivers/ipack/devices/
Dipoctal.c49 struct ipoctal_channel channel[NR_CHANNELS]; member
58 return container_of(chan, struct ipoctal, channel[index]); in chan_to_ipoctal()
61 static void ipoctal_reset_channel(struct ipoctal_channel *channel) in ipoctal_reset_channel() argument
63 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
64 channel->rx_enable = 0; in ipoctal_reset_channel()
65 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
66 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
67 iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr); in ipoctal_reset_channel()
68 iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr); in ipoctal_reset_channel()
73 struct ipoctal_channel *channel; in ipoctal_port_activate() local
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/Linux-v5.4/Documentation/devicetree/bindings/powerpc/fsl/
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
24 - interrupts : interrupt specifier for DMA channel IRQ
38 dma-channel@0 {
39 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 dma-channel@80 {
46 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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/Linux-v5.4/drivers/staging/most/sound/
Dsound.c28 * struct channel - private structure to keep channel specific data
30 * @iface: interface for which the channel belongs to
31 * @cfg: channel configuration
34 * @id: channel index
42 struct channel { struct
160 * get_channel - get pointer to channel
162 * @channel_id: channel ID
164 * This traverses the channel list and returns the channel matching the
167 * Returns pointer to channel on success or NULL otherwise.
169 static struct channel *get_channel(struct most_interface *iface, in get_channel()
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/Linux-v5.4/sound/xen/
Dxen_snd_front_evtchnl.c23 struct xen_snd_front_evtchnl *channel = dev_id; in evtchnl_interrupt_req() local
24 struct xen_snd_front_info *front_info = channel->front_info; in evtchnl_interrupt_req()
28 if (unlikely(channel->state != EVTCHNL_STATE_CONNECTED)) in evtchnl_interrupt_req()
31 mutex_lock(&channel->ring_io_lock); in evtchnl_interrupt_req()
34 rp = channel->u.req.ring.sring->rsp_prod; in evtchnl_interrupt_req()
43 for (i = channel->u.req.ring.rsp_cons; i != rp; i++) { in evtchnl_interrupt_req()
44 resp = RING_GET_RESPONSE(&channel->u.req.ring, i); in evtchnl_interrupt_req()
45 if (resp->id != channel->evt_id) in evtchnl_interrupt_req()
57 channel->u.req.resp_status = resp->status; in evtchnl_interrupt_req()
58 complete(&channel->u.req.completion); in evtchnl_interrupt_req()
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/Linux-v5.4/drivers/staging/media/allegro-dvt/
Dallegro-core.c209 /* user_id is used to identify the channel during CREATE_CHANNEL */
226 allegro_set_state(struct allegro_channel *channel, enum allegro_state state) in allegro_set_state() argument
228 channel->state = state; in allegro_set_state()
234 allegro_get_state(struct allegro_channel *channel) in allegro_get_state() argument
236 return channel->state; in allegro_get_state()
303 u32 reserved0; /* maybe a unused channel id */
532 /* Helper functions for channel and user operations */
546 struct allegro_channel *channel; in allegro_find_channel_by_user_id() local
548 list_for_each_entry(channel, &dev->channels, list) { in allegro_find_channel_by_user_id()
549 if (channel->user_id == user_id) in allegro_find_channel_by_user_id()
[all …]
/Linux-v5.4/drivers/hsi/clients/
Dhsi_char.c66 * struct hsc_channel - hsi_char internal channel data
67 * @ch: channel number
68 * @flags: Keeps state of the channel (open/close, reading, writing)
116 static void hsc_add_tail(struct hsc_channel *channel, struct hsi_msg *msg, in hsc_add_tail() argument
121 spin_lock_irqsave(&channel->lock, flags); in hsc_add_tail()
123 spin_unlock_irqrestore(&channel->lock, flags); in hsc_add_tail()
126 static struct hsi_msg *hsc_get_first_msg(struct hsc_channel *channel, in hsc_get_first_msg() argument
132 spin_lock_irqsave(&channel->lock, flags); in hsc_get_first_msg()
140 spin_unlock_irqrestore(&channel->lock, flags); in hsc_get_first_msg()
161 static void hsc_reset_list(struct hsc_channel *channel, struct list_head *l) in hsc_reset_list() argument
[all …]
/Linux-v5.4/drivers/scsi/qla2xxx/
Dqla_devtbl.h8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
17 "QCP2340", "cPCI to 2Gb FC, Single Channel", /* 0x109 */
[all …]
/Linux-v5.4/drivers/hsi/controllers/
Domap_ssi_regs.h33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
62 # define SSI_FULL(channel) (1 << (channel)) argument
71 #define SSI_SST_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
72 #define SSI_SST_SWAPBUF_CH_REG(channel) (0xc0 + ((channel) * 4)) argument
82 # define SSI_NOTEMPTY(channel) (1 << (channel)) argument
91 #define SSI_SSR_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
[all …]
/Linux-v5.4/sound/soc/codecs/
Dtas5086.c71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
538 SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
541 SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
544 SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
568 SOC_DAPM_ENUM("Channel 1 input", tas5086_dapm_input_mux_enum[0]),
569 SOC_DAPM_ENUM("Channel 2 input", tas5086_dapm_input_mux_enum[1]),
570 SOC_DAPM_ENUM("Channel 3 input", tas5086_dapm_input_mux_enum[2]),
571 SOC_DAPM_ENUM("Channel 4 input", tas5086_dapm_input_mux_enum[3]),
572 SOC_DAPM_ENUM("Channel 5 input", tas5086_dapm_input_mux_enum[4]),
573 SOC_DAPM_ENUM("Channel 6 input", tas5086_dapm_input_mux_enum[5]),
[all …]
/Linux-v5.4/Documentation/sound/designs/
Dchannel-mapping-api.rst2 ALSA PCM channel-mapping API
10 The channel mapping API allows user to query the possible channel maps
11 and the current channel map, also optionally to modify the channel map
14 A channel map is an array of position for each PCM channel.
15 Typically, a stereo PCM stream has a channel map of
17 while a 4.0 surround PCM stream has a channel map of
20 The problem, so far, was that we had no standard channel map
21 explicitly, and applications had no way to know which channel
29 was no way to specify this because of lack of channel map
30 specification. These are the main motivations for the new channel
[all …]
/Linux-v5.4/drivers/staging/uwb/
Dradio.c3 * UWB radio (channel) management.
17 * Default to channel 9 (BG1, TFC1) unless the user has in uwb_radio_select_channel()
18 * selected a specific channel or there are no active PALs. in uwb_radio_select_channel()
29 * Notify all active PALs that the channel has changed.
31 static void uwb_radio_channel_changed(struct uwb_rc *rc, int channel) in uwb_radio_channel_changed() argument
36 if (pal->channel && channel != pal->channel) { in uwb_radio_channel_changed()
37 pal->channel = channel; in uwb_radio_channel_changed()
39 pal->channel_changed(pal, pal->channel); in uwb_radio_channel_changed()
45 * Change to a new channel and notify any active PALs of the new
46 * channel.
[all …]
/Linux-v5.4/drivers/staging/vt6655/
Drf.c57 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
58 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
59 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
60 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
61 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
62 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
63 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
64 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
65 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
66 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
/Linux-v5.4/drivers/gpu/host1x/
Dchannel.c3 * Tegra host1x Channel
11 #include "channel.h"
45 struct host1x *host = dev_get_drvdata(job->channel->dev->parent); in host1x_job_submit()
51 struct host1x_channel *host1x_channel_get(struct host1x_channel *channel) in host1x_channel_get() argument
53 kref_get(&channel->refcount); in host1x_channel_get()
55 return channel; in host1x_channel_get()
60 * host1x_channel_get_index() - Attempt to get channel reference by index
62 * @index: Index of channel
64 * If channel number @index is currently allocated, increase its refcount
80 struct host1x_channel *channel = in release_channel() local
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/Linux-v5.4/sound/soc/sprd/
Dsprd-mcdt.c57 /* Channel water mark definition */
62 /* DMA channel select definition */
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
128 static void sprd_mcdt_dac_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_dac_set_watermark() argument
131 u32 reg = MCDT_DAC0_WTMK + channel * 4; in sprd_mcdt_dac_set_watermark()
140 static void sprd_mcdt_adc_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_adc_set_watermark() argument
143 u32 reg = MCDT_ADC0_WTMK + channel * 4; in sprd_mcdt_adc_set_watermark()
152 static void sprd_mcdt_dac_dma_enable(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_dac_dma_enable() argument
155 u32 shift = MCDT_DAC_DMA_SHIFT + channel; in sprd_mcdt_dac_dma_enable()
[all …]
/Linux-v5.4/arch/sh/drivers/dma/
Ddma-api.c30 * the channel is. in get_dma_info()
76 struct dma_channel *channel; in get_dma_channel() local
83 channel = &info->channels[i]; in get_dma_channel()
84 if (channel->vchan == chan) in get_dma_channel()
85 return channel; in get_dma_channel()
95 struct dma_channel *channel = get_dma_channel(chan); in get_dma_residue() local
98 return info->ops->get_residue(channel); in get_dma_residue()
116 * request_dma_bycap - Allocate a DMA channel based on its capabilities
120 * Search all channels of all DMA controllers to find a channel which
121 * matches the requested capabilities. The result is the channel
[all …]
/Linux-v5.4/drivers/mailbox/
Dmailbox-sti.c30 #define STI_IRQ_SET_OFFSET 0x24 /* Generate a Tx channel interrupt */
33 #define STI_ENA_SET_OFFSET 0x84 /* Enable a channel */
34 #define STI_ENA_CLR_OFFSET 0xa4 /* Disable a channel */
44 * A channel an be used for TX or RX
47 * @mbox: Representation of a communication channel controller
66 * @num_chan: Maximum number of channel per instance
74 * STi Mailbox allocated channel information
77 * @instance: Instance number channel resides in
78 * @channel: Channel number pertaining to this container
83 unsigned int channel; member
[all …]
/Linux-v5.4/drivers/firmware/tegra/
Dbpmp.c34 channel_to_ops(struct tegra_bpmp_channel *channel) in channel_to_ops() argument
36 struct tegra_bpmp *bpmp = channel->bpmp; in channel_to_ops()
78 tegra_bpmp_channel_get_thread_index(struct tegra_bpmp_channel *channel) in tegra_bpmp_channel_get_thread_index() argument
80 struct tegra_bpmp *bpmp = channel->bpmp; in tegra_bpmp_channel_get_thread_index()
86 index = channel - channel->bpmp->threaded_channels; in tegra_bpmp_channel_get_thread_index()
101 static bool tegra_bpmp_is_response_ready(struct tegra_bpmp_channel *channel) in tegra_bpmp_is_response_ready() argument
103 const struct tegra_bpmp_ops *ops = channel_to_ops(channel); in tegra_bpmp_is_response_ready()
105 return ops->is_response_ready(channel); in tegra_bpmp_is_response_ready()
108 static bool tegra_bpmp_is_request_ready(struct tegra_bpmp_channel *channel) in tegra_bpmp_is_request_ready() argument
110 const struct tegra_bpmp_ops *ops = channel_to_ops(channel); in tegra_bpmp_is_request_ready()
[all …]
/Linux-v5.4/Documentation/hwmon/
Dsmm665.rst79 Each monitored channel has its own high and low limits, plus a critical
113 For SMM465 and SMM764, values for Channel E and F are reported but undefined.
118 in3_input Channel A voltage (mV)
119 in4_input Channel B voltage (mV)
120 in5_input Channel C voltage (mV)
121 in6_input Channel D voltage (mV)
122 in7_input Channel E voltage (mV)
123 in8_input Channel F voltage (mV)
129 in3_min Channel A minimum voltage (mV)
130 in4_min Channel B minimum voltage (mV)
[all …]
/Linux-v5.4/drivers/hv/
Dchannel_mgmt.c26 static void init_vp_index(struct vmbus_channel *channel, u16 dev_type);
41 /* Fibre Channel */
140 * The rescinded channel may be blocked waiting for a response from the host;
143 static void vmbus_rescind_cleanup(struct vmbus_channel *channel) in vmbus_rescind_cleanup() argument
150 channel->rescind = true; in vmbus_rescind_cleanup()
154 if (msginfo->waiting_channel == channel) { in vmbus_rescind_cleanup()
172 static u16 hv_get_dev_type(const struct vmbus_channel *channel) in hv_get_dev_type() argument
174 const guid_t *guid = &channel->offermsg.offer.if_type; in hv_get_dev_type()
177 if (is_hvsock_channel(channel) || is_unsupported_vmbus_devs(guid)) in hv_get_dev_type()
191 * @buf: Raw buffer channel data
[all …]
/Linux-v5.4/drivers/usb/musb/
Dmusbhsdma.c59 struct dma_channel channel; member
71 struct musb_dma_channel channel[MUSB_HSDMA_CHANNELS]; member
79 static void dma_channel_release(struct dma_channel *channel);
84 struct dma_channel *channel; in dma_controller_stop() local
89 "Stopping DMA controller while channel active\n"); in dma_controller_stop()
93 channel = &controller->channel[bit].channel; in dma_controller_stop()
94 dma_channel_release(channel); in dma_controller_stop()
109 struct dma_channel *channel = NULL; in dma_channel_allocate() local
115 musb_channel = &(controller->channel[bit]); in dma_channel_allocate()
120 channel = &(musb_channel->channel); in dma_channel_allocate()
[all …]

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