| /Linux-v5.15/drivers/visorbus/ |
| D | visorchannel.c | 8 * This provides s-Par channel communication primitives, which are
9 * independent of the mechanism used to access the channel data.
36 * channel creator knows if more than one thread will be inserting or
48 void visorchannel_destroy(struct visorchannel *channel) in visorchannel_destroy() argument
50 if (!channel) in visorchannel_destroy()
53 if (channel->mapped) { in visorchannel_destroy()
54 memunmap(channel->mapped); in visorchannel_destroy()
55 if (channel->requested) in visorchannel_destroy()
56 release_mem_region(channel->physaddr, channel->nbytes); in visorchannel_destroy()
58 kfree(channel); in visorchannel_destroy()
[all …]
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| /Linux-v5.15/drivers/net/ethernet/sfc/ |
| D | efx_channels.c | 48 /* This is the weight assigned to each of the (per-channel) virtual
57 int efx_channel_dummy_op_int(struct efx_channel *channel) in efx_channel_dummy_op_int() argument
62 void efx_channel_dummy_op_void(struct efx_channel *channel) in efx_channel_dummy_op_void() argument
166 * We need a channel per event queue, plus a VI per tx queue. in efx_allocate_msix_channels()
283 /* Fall back to single channel MSI */ in efx_probe_interrupts()
371 struct efx_channel *channel; in efx_set_interrupt_affinity() local
374 efx_for_each_channel(channel, efx) { in efx_set_interrupt_affinity()
375 cpu = cpumask_local_spread(channel->channel, in efx_set_interrupt_affinity()
377 irq_set_affinity_hint(channel->irq, cpumask_of(cpu)); in efx_set_interrupt_affinity()
383 struct efx_channel *channel; in efx_clear_interrupt_affinity() local
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| /Linux-v5.15/drivers/rpmsg/ |
| D | qcom_smd.c | 30 * Each channel consists of a control item (channel info) and a ring buffer
31 * pair. The channel info carry information related to channel state, flow
37 * Upon creating a new channel the remote processor allocates channel info and
39 * interrupt is sent to the other end of the channel and a scan for new
40 * channels should be done. A channel never goes away, it will only change
44 * channel by setting the state of its end of the channel to "opening" and
46 * consume the channel. Upon finding a consumer we finish the handshake and the
47 * channel is up.
49 * Upon closing a channel, the remote processor will update the state of its
50 * end of the channel and signal us, we will then unregister any attached
[all …]
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| D | qcom_glink_native.c | 63 * @in_use: To mark if intent is already in use for the channel
82 * @mbox_chan: mailbox channel
91 * @lcids: idr of all channels with a known local channel id
92 * @rcids: idr of all channels with a known remote channel id
131 * struct glink_channel - internal representation of a channel
133 * @ept: rpmsg endpoint this channel is associated with
135 * @refcount: refcount for the channel object
137 * @name: unique channel name/identifier
138 * @lcid: channel id, in local space
139 * @rcid: channel id, in remote space
[all …]
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| /Linux-v5.15/drivers/char/xillybus/ |
| D | xillybus_core.c | 102 "Malformed message (skipping): opcode=%d, channel=%03x, dir=%d, bufno=%03x, data=%07x\n", in malformed_message()
120 struct xilly_channel *channel; in xillybus_isr() local
180 channel = ep->channels[msg_channel]; in xillybus_isr()
182 if (msg_dir) { /* Write channel */ in xillybus_isr()
183 if (msg_bufno >= channel->num_wr_buffers) { in xillybus_isr()
187 spin_lock(&channel->wr_spinlock); in xillybus_isr()
188 channel->wr_buffers[msg_bufno]->end_offset = in xillybus_isr()
190 channel->wr_fpga_buf_idx = msg_bufno; in xillybus_isr()
191 channel->wr_empty = 0; in xillybus_isr()
192 channel->wr_sleepy = 0; in xillybus_isr()
[all …]
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| /Linux-v5.15/drivers/staging/greybus/ |
| D | light.c | 69 static void gb_lights_channel_free(struct gb_channel *channel);
71 static struct gb_connection *get_conn_from_channel(struct gb_channel *channel) in get_conn_from_channel() argument
73 return channel->light->glights->connection; in get_conn_from_channel()
81 static bool is_channel_flash(struct gb_channel *channel) in is_channel_flash() argument
83 return !!(channel->mode & (GB_CHANNEL_MODE_FLASH | GB_CHANNEL_MODE_TORCH in is_channel_flash()
95 static struct led_classdev *get_channel_cdev(struct gb_channel *channel) in get_channel_cdev() argument
97 return &channel->fled.led_cdev; in get_channel_cdev()
103 struct gb_channel *channel = NULL; in get_channel_from_mode() local
107 channel = &light->channels[i]; in get_channel_from_mode()
108 if (channel && channel->mode == mode) in get_channel_from_mode()
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| /Linux-v5.15/drivers/ipack/devices/ |
| D | ipoctal.c | 48 struct ipoctal_channel channel[NR_CHANNELS]; member
57 return container_of(chan, struct ipoctal, channel[index]); in chan_to_ipoctal()
60 static void ipoctal_reset_channel(struct ipoctal_channel *channel) in ipoctal_reset_channel() argument
62 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
63 channel->rx_enable = 0; in ipoctal_reset_channel()
64 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
65 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
66 iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr); in ipoctal_reset_channel()
67 iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr); in ipoctal_reset_channel()
72 struct ipoctal_channel *channel; in ipoctal_port_activate() local
[all …]
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| /Linux-v5.15/drivers/media/platform/allegro-dvt/ |
| D | allegro-core.c | 260 /* user_id is used to identify the channel during CREATE_CHANNEL */
281 allegro_channel_get_i_frame_qp(struct allegro_channel *channel) in allegro_channel_get_i_frame_qp() argument
283 if (channel->codec == V4L2_PIX_FMT_HEVC) in allegro_channel_get_i_frame_qp()
284 return v4l2_ctrl_g_ctrl(channel->mpeg_video_hevc_i_frame_qp); in allegro_channel_get_i_frame_qp()
286 return v4l2_ctrl_g_ctrl(channel->mpeg_video_h264_i_frame_qp); in allegro_channel_get_i_frame_qp()
290 allegro_channel_get_p_frame_qp(struct allegro_channel *channel) in allegro_channel_get_p_frame_qp() argument
292 if (channel->codec == V4L2_PIX_FMT_HEVC) in allegro_channel_get_p_frame_qp()
293 return v4l2_ctrl_g_ctrl(channel->mpeg_video_hevc_p_frame_qp); in allegro_channel_get_p_frame_qp()
295 return v4l2_ctrl_g_ctrl(channel->mpeg_video_h264_p_frame_qp); in allegro_channel_get_p_frame_qp()
299 allegro_channel_get_b_frame_qp(struct allegro_channel *channel) in allegro_channel_get_b_frame_qp() argument
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
24 - interrupts : interrupt specifier for DMA channel IRQ
38 dma-channel@0 {
39 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 dma-channel@80 {
46 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
[all …]
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| /Linux-v5.15/drivers/dma/sh/ |
| D | rz-dmac.c | 189 static void rz_dmac_ch_writel(struct rz_dmac_chan *channel, unsigned int val, in rz_dmac_ch_writel() argument
193 writel(val, channel->ch_base + offset); in rz_dmac_ch_writel()
195 writel(val, channel->ch_cmn_base + offset); in rz_dmac_ch_writel()
198 static u32 rz_dmac_ch_readl(struct rz_dmac_chan *channel, in rz_dmac_ch_readl() argument
202 return readl(channel->ch_base + offset); in rz_dmac_ch_readl()
204 return readl(channel->ch_cmn_base + offset); in rz_dmac_ch_readl()
212 static void rz_lmdesc_setup(struct rz_dmac_chan *channel, in rz_lmdesc_setup() argument
217 channel->lmdesc.base = lmdesc; in rz_lmdesc_setup()
218 channel->lmdesc.head = lmdesc; in rz_lmdesc_setup()
219 channel->lmdesc.tail = lmdesc; in rz_lmdesc_setup()
[all …]
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| /Linux-v5.15/drivers/most/ |
| D | most_snd.c | 28 * struct channel - private structure to keep channel specific data
30 * @iface: interface for which the channel belongs to
31 * @cfg: channel configuration
34 * @id: channel index
42 struct channel { struct
150 * get_channel - get pointer to channel
152 * @channel_id: channel ID
154 * This traverses the channel list and returns the channel matching the
157 * Returns pointer to channel on success or NULL otherwise.
159 static struct channel *get_channel(struct most_interface *iface, in get_channel()
[all …]
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| /Linux-v5.15/sound/xen/ |
| D | xen_snd_front_evtchnl.c | 23 struct xen_snd_front_evtchnl *channel = dev_id; in evtchnl_interrupt_req() local
24 struct xen_snd_front_info *front_info = channel->front_info; in evtchnl_interrupt_req()
28 if (unlikely(channel->state != EVTCHNL_STATE_CONNECTED)) in evtchnl_interrupt_req()
31 mutex_lock(&channel->ring_io_lock); in evtchnl_interrupt_req()
34 rp = channel->u.req.ring.sring->rsp_prod; in evtchnl_interrupt_req()
43 for (i = channel->u.req.ring.rsp_cons; i != rp; i++) { in evtchnl_interrupt_req()
44 resp = RING_GET_RESPONSE(&channel->u.req.ring, i); in evtchnl_interrupt_req()
45 if (resp->id != channel->evt_id) in evtchnl_interrupt_req()
53 channel->u.req.resp_status = resp->status; in evtchnl_interrupt_req()
54 complete(&channel->u.req.completion); in evtchnl_interrupt_req()
[all …]
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| /Linux-v5.15/drivers/net/ipa/ |
| D | gsi.c | 53 * of data to or from the IPA. A channel is implemented as a ring buffer,
60 * or more TREs to a channel, the writer (either the IPA or an EE) writes a
64 * Each channel has a GSI "event ring" associated with it. An event ring
65 * is implemented very much like a channel ring, but is always directed from
66 * the IPA to an EE. The IPA notifies an EE (such as the AP) about channel
67 * events by adding an entry to the event ring associated with the channel.
70 * to the channel TRE whose completion the event represents.
72 * Each TRE in a channel ring has a set of flags. One flag indicates whether
74 * an interrupt) in the channel's event ring. Other flags allow transfer
77 * to signal completion of channel transfers.
[all …]
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| /Linux-v5.15/drivers/hsi/clients/ |
| D | hsi_char.c | 66 * struct hsc_channel - hsi_char internal channel data
67 * @ch: channel number
68 * @flags: Keeps state of the channel (open/close, reading, writing)
116 static void hsc_add_tail(struct hsc_channel *channel, struct hsi_msg *msg, in hsc_add_tail() argument
121 spin_lock_irqsave(&channel->lock, flags); in hsc_add_tail()
123 spin_unlock_irqrestore(&channel->lock, flags); in hsc_add_tail()
126 static struct hsi_msg *hsc_get_first_msg(struct hsc_channel *channel, in hsc_get_first_msg() argument
132 spin_lock_irqsave(&channel->lock, flags); in hsc_get_first_msg()
140 spin_unlock_irqrestore(&channel->lock, flags); in hsc_get_first_msg()
161 static void hsc_reset_list(struct hsc_channel *channel, struct list_head *l) in hsc_reset_list() argument
[all …]
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| /Linux-v5.15/drivers/scsi/qla2xxx/ |
| D | qla_devtbl.h | 8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
17 "QCP2340", "cPCI to 2Gb FC, Single Channel", /* 0x109 */
[all …]
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| /Linux-v5.15/drivers/hsi/controllers/ |
| D | omap_ssi_regs.h | 33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
62 # define SSI_FULL(channel) (1 << (channel)) argument
71 #define SSI_SST_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
72 #define SSI_SST_SWAPBUF_CH_REG(channel) (0xc0 + ((channel) * 4)) argument
82 # define SSI_NOTEMPTY(channel) (1 << (channel)) argument
91 #define SSI_SSR_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
[all …]
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| /Linux-v5.15/sound/soc/codecs/ |
| D | tas5086.c | 71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
538 SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
541 SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
544 SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
568 SOC_DAPM_ENUM("Channel 1 input", tas5086_dapm_input_mux_enum[0]),
569 SOC_DAPM_ENUM("Channel 2 input", tas5086_dapm_input_mux_enum[1]),
570 SOC_DAPM_ENUM("Channel 3 input", tas5086_dapm_input_mux_enum[2]),
571 SOC_DAPM_ENUM("Channel 4 input", tas5086_dapm_input_mux_enum[3]),
572 SOC_DAPM_ENUM("Channel 5 input", tas5086_dapm_input_mux_enum[4]),
573 SOC_DAPM_ENUM("Channel 6 input", tas5086_dapm_input_mux_enum[5]),
[all …]
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| /Linux-v5.15/drivers/gpu/host1x/ |
| D | channel.c | 3 * Tegra host1x Channel
11 #include "channel.h"
45 struct host1x *host = dev_get_drvdata(job->channel->dev->parent); in host1x_job_submit()
51 struct host1x_channel *host1x_channel_get(struct host1x_channel *channel) in host1x_channel_get() argument
53 kref_get(&channel->refcount); in host1x_channel_get()
55 return channel; in host1x_channel_get()
60 * host1x_channel_get_index() - Attempt to get channel reference by index
62 * @index: Index of channel
64 * If channel number @index is currently allocated, increase its refcount
80 struct host1x_channel *channel = in release_channel() local
[all …]
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| /Linux-v5.15/Documentation/sound/designs/ |
| D | channel-mapping-api.rst | 2 ALSA PCM channel-mapping API
10 The channel mapping API allows user to query the possible channel maps
11 and the current channel map, also optionally to modify the channel map
14 A channel map is an array of position for each PCM channel.
15 Typically, a stereo PCM stream has a channel map of
17 while a 4.0 surround PCM stream has a channel map of
20 The problem, so far, was that we had no standard channel map
21 explicitly, and applications had no way to know which channel
29 was no way to specify this because of lack of channel map
30 specification. These are the main motivations for the new channel
[all …]
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| /Linux-v5.15/drivers/ptp/ |
| D | ptp_idt82p33.c | 185 static int idt82p33_dpll_set_mode(struct idt82p33_channel *channel, in idt82p33_dpll_set_mode() argument
188 struct idt82p33 *idt82p33 = channel->idt82p33; in idt82p33_dpll_set_mode()
192 if (channel->pll_mode == mode) in idt82p33_dpll_set_mode()
195 err = idt82p33_read(idt82p33, channel->dpll_mode_cnfg, in idt82p33_dpll_set_mode()
204 err = idt82p33_write(idt82p33, channel->dpll_mode_cnfg, in idt82p33_dpll_set_mode()
209 channel->pll_mode = dpll_mode; in idt82p33_dpll_set_mode()
214 static int _idt82p33_gettime(struct idt82p33_channel *channel, in _idt82p33_gettime() argument
217 struct idt82p33 *idt82p33 = channel->idt82p33; in _idt82p33_gettime()
226 err = idt82p33_write(idt82p33, channel->dpll_tod_trigger, in _idt82p33_gettime()
235 err = idt82p33_read(idt82p33, channel->dpll_tod_sts, buf, sizeof(buf)); in _idt82p33_gettime()
[all …]
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| /Linux-v5.15/drivers/staging/vt6655/ |
| D | rf.c | 55 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
56 0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
57 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
58 0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
59 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
60 0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
61 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
62 0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
63 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
64 0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
[all …]
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| /Linux-v5.15/sound/soc/sprd/ |
| D | sprd-mcdt.c | 57 /* Channel water mark definition */
62 /* DMA channel select definition */
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
128 static void sprd_mcdt_dac_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_dac_set_watermark() argument
131 u32 reg = MCDT_DAC0_WTMK + channel * 4; in sprd_mcdt_dac_set_watermark()
140 static void sprd_mcdt_adc_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_adc_set_watermark() argument
143 u32 reg = MCDT_ADC0_WTMK + channel * 4; in sprd_mcdt_adc_set_watermark()
152 static void sprd_mcdt_dac_dma_enable(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_dac_dma_enable() argument
155 u32 shift = MCDT_DAC_DMA_SHIFT + channel; in sprd_mcdt_dac_dma_enable()
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| /Linux-v5.15/arch/sh/drivers/dma/ |
| D | dma-api.c | 30 * the channel is. in get_dma_info()
76 struct dma_channel *channel; in get_dma_channel() local
83 channel = &info->channels[i]; in get_dma_channel()
84 if (channel->vchan == chan) in get_dma_channel()
85 return channel; in get_dma_channel()
95 struct dma_channel *channel = get_dma_channel(chan); in get_dma_residue() local
98 return info->ops->get_residue(channel); in get_dma_residue()
116 * request_dma_bycap - Allocate a DMA channel based on its capabilities
120 * Search all channels of all DMA controllers to find a channel which
121 * matches the requested capabilities. The result is the channel
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| /Linux-v5.15/drivers/firmware/tegra/ |
| D | bpmp.c | 35 channel_to_ops(struct tegra_bpmp_channel *channel) in channel_to_ops() argument
37 struct tegra_bpmp *bpmp = channel->bpmp; in channel_to_ops()
79 tegra_bpmp_channel_get_thread_index(struct tegra_bpmp_channel *channel) in tegra_bpmp_channel_get_thread_index() argument
81 struct tegra_bpmp *bpmp = channel->bpmp; in tegra_bpmp_channel_get_thread_index()
87 index = channel - channel->bpmp->threaded_channels; in tegra_bpmp_channel_get_thread_index()
102 static bool tegra_bpmp_is_response_ready(struct tegra_bpmp_channel *channel) in tegra_bpmp_is_response_ready() argument
104 const struct tegra_bpmp_ops *ops = channel_to_ops(channel); in tegra_bpmp_is_response_ready()
106 return ops->is_response_ready(channel); in tegra_bpmp_is_response_ready()
109 static bool tegra_bpmp_is_request_ready(struct tegra_bpmp_channel *channel) in tegra_bpmp_is_request_ready() argument
111 const struct tegra_bpmp_ops *ops = channel_to_ops(channel); in tegra_bpmp_is_request_ready()
[all …]
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| /Linux-v5.15/drivers/mailbox/ |
| D | mailbox-sti.c | 30 #define STI_IRQ_SET_OFFSET 0x24 /* Generate a Tx channel interrupt */
33 #define STI_ENA_SET_OFFSET 0x84 /* Enable a channel */
34 #define STI_ENA_CLR_OFFSET 0xa4 /* Disable a channel */
42 * @mbox: Representation of a communication channel controller
51 * A channel an be used for TX or RX
66 * @num_chan: Maximum number of channel per instance
74 * struct sti_channel - STi Mailbox allocated channel information
77 * @instance: Instance number channel resides in
78 * @channel: Channel number pertaining to this container
83 unsigned int channel; member
[all …]
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