| /Linux-v5.15/Documentation/devicetree/bindings/i2c/ |
| D | i2c-ocores.txt | 1 Device tree configuration for i2c-ocores
4 - compatible : "opencores,i2c-ocores"
6 "sifive,fu540-c000-i2c", "sifive,i2c0"
8 FU540-C000 SoC.
9 "sifive,fu740-c000-i2c", "sifive,i2c0"
11 FU740-C000 SoC.
12 Please refer to sifive-blocks-ip-versioning.txt for
14 - reg : bus address start and address range size of device
15 - clocks : handle to the controller clock; see the note below.
16 Mutually exclusive with opencores,ip-clock-frequency
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| D | i2c.txt | 7 Required properties (per bus)
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
20 Optional properties (per bus)
21 -----------------------------
26 - clock-frequency
27 frequency of bus clock in Hz.
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| D | aspeed,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rayn Chen <rayn_chen@aspeedtech.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - aspeed,ast2400-i2c-bus
19 - aspeed,ast2500-i2c-bus
20 - aspeed,ast2600-i2c-bus
25 - description: address offset and range of bus
26 - description: address offset and range of bus buffer
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| D | i2c-qcom-cci.txt | 5 - compatible:
9 "qcom,msm8916-cci"
10 "qcom,msm8996-cci"
11 "qcom,sdm845-cci"
12 "qcom,sm8250-cci"
14 - reg
16 Value type: <prop-encoded-array>
20 - interrupts:
22 Value type: <prop-encoded-array>
27 - clocks:
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| D | i2c-pca-platform.txt | 4 parallel-bus microcontrollers/microprocessors and the serial I2C-bus
5 and allows the parallel bus system to communicate bi-directionally
6 with the I2C-bus.
10 - reg : Offset and length of the register set for the device
11 - compatible : one of "nxp,pca9564" or "nxp,pca9665"
14 - interrupts : the interrupt number
15 - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line
17 - clock-frequency : I2C bus frequency.
22 #address-cells = <1>;
23 #size-cells = <0>;
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| D | i2c-opal.txt | 1 Device-tree bindings for I2C OPAL driver
2 ----------------------------------------
6 perspective, the properties of use are "ibm,port-name" and "ibm,opal-id".
10 - reg: Port-id within a given master
11 - compatible: must be "ibm,opal-i2c"
12 - ibm,opal-id: Refers to a specific bus and used to identify it when calling
14 - bus-frequency: Operating frequency of the i2c bus (in HZ). Informational for
18 - ibm,port-name: Firmware provides this name that uniquely identifies the i2c
23 a P8 on-chip bus.
27 i2c-bus@0 {
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| /Linux-v5.15/drivers/devfreq/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
10 operating frequency based on the device driver's policy.
20 clock frequency of the device, which is also attached
21 to a device by 1-to-1. The device registering devfreq takes the
22 responsibility to "interpret" the representative frequency and
38 Chooses frequency based on the recent load on the device. Works
40 Simple-Ondemand should be able to provide busy/total counter
47 Sets the frequency at the maximum available frequency.
48 This governor always returns UINT_MAX as frequency so that
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| D | exynos-bus.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic Exynos Bus frequency driver with DEVFREQ Framework
8 * This driver support Exynos Bus frequency feature by using
14 #include <linux/devfreq-event.h>
42 * Control the devfreq-event device to get the current state of bus
45 static int exynos_bus_##ops(struct exynos_bus *bus) \
49 for (i = 0; i < bus->edev_count; i++) { \
50 if (!bus->edev[i]) \
52 ret = devfreq_event_##ops(bus->edev[i]); \
63 static int exynos_bus_get_event(struct exynos_bus *bus, in exynos_bus_get_event() argument
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
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| D | aspeed-g5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
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| D | aspeed-g4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
51 compatible = "simple-bus";
52 #address-cells = <1>;
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| D | bcm23550.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
37 #include "dt-bindings/clock/bcm21664.h"
40 #address-cells = <1>;
41 #size-cells = <1>;
44 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
52 compatible = "arm,cortex-a7";
54 clock-frequency = <1000000000>;
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| D | r8a7742-iwg21d-q7-dbcm-ca.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZ/G1H Qseven board development
9 /dts-v1/;
10 #include "r8a7742-iwg21d-q7.dts"
13 model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
24 mclk_cam1: mclk-cam1 {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <26000000>;
30 mclk_cam2: mclk-cam2 {
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| /Linux-v5.15/drivers/staging/iio/Documentation/ |
| D | sysfs-bus-iio-dds | 2 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY
4 Contact: linux-iio@vger.kernel.org
6 Stores frequency into tuning word Y.
8 which allows for pin controlled FSK Frequency Shift Keying
13 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY_scale
15 Contact: linux-iio@vger.kernel.org
18 obtain the desired value in Hz. If shared across all frequency
22 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencysymbol
24 Contact: linux-iio@vger.kernel.org
26 Specifies the active output frequency tuning word. The value
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| /Linux-v5.15/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-impedance-analyzer-ad5933 | 1 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_start
4 Contact: linux-iio@vger.kernel.org
6 Frequency sweep start frequency in Hz.
8 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_increment
11 Contact: linux-iio@vger.kernel.org
13 Frequency increment in Hz (step size) between consecutive
14 frequency points along the sweep.
16 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_points
19 Contact: linux-iio@vger.kernel.org
21 Number of frequency points (steps) in the frequency sweep.
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| D | sysfs-platform-dptf | 1 What: /sys/bus/platform/devices/INT3407:00/dptf_power/charger_type
4 Contact: linux-acpi@vger.kernel.org
6 (RO) The charger type - Traditional, Hybrid or NVDC.
8 What: /sys/bus/platform/devices/INT3407:00/dptf_power/adapter_rating_mw
11 Contact: linux-acpi@vger.kernel.org
16 What: /sys/bus/platform/devices/INT3407:00/dptf_power/max_platform_power_mw
19 Contact: linux-acpi@vger.kernel.org
24 What: /sys/bus/platform/devices/INT3407:00/dptf_power/platform_power_source
27 Contact: linux-acpi@vger.kernel.org
33 - 0x00 = DC
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| /Linux-v5.15/Documentation/devicetree/bindings/devfreq/ |
| D | exynos-bus.txt | 1 * Generic Exynos Bus frequency device
4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture
5 for buses. Generally, each bus of Exynos SoC includes a source clock
6 and a power line, which are able to change the clock frequency
7 of the bus in runtime. To monitor the usage of each bus in runtime,
9 is able to measure the current load of sub-blocks.
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
12 The each AXI bus has the owned source clock but, has not the only owned
13 power line. The power line might be shared among one more sub-blocks.
14 So, we can divide into two type of device as the role of each sub-block.
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| D | rk3399_dmc.txt | 4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
15 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
19 - interrupts: The CPU interrupt number. The interrupt specifier
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| /Linux-v5.15/arch/powerpc/sysdev/ |
| D | mpc5xxx_clocks.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * mpc5xxx_get_bus_frequency - Find the bus frequency for a device
6 * Returns bus frequency (IPS on MPC512x, IPB on MPC52xx),
7 * or 0 if the bus frequency cannot be found.
21 p_bus_freq = of_get_property(node, "bus-frequency", NULL); in mpc5xxx_get_bus_frequency()
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| /Linux-v5.15/Documentation/devicetree/bindings/mmc/ |
| D | cavium-mmc.txt | 10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
17 - clocks : phandle
20 - for cd, bus-width and additional generic mmc parameters
22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
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| /Linux-v5.15/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
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| D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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| /Linux-v5.15/drivers/net/ethernet/xilinx/ |
| D | xilinx_axienet_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
37 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
51 * axienet_mdio_read - MDIO interface read function
52 * @bus: Pointer to mii bus structure
56 * Return: The register contents on success, -ETIMEDOUT on a timeout
62 static int axienet_mdio_read(struct mii_bus *bus, int phy_id, int reg) in axienet_mdio_read() argument
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| /Linux-v5.15/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/ |
| D | i2c.txt | 3 The I2C controller is expressed as a bus under the CPM node.
6 - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
7 - reg : On CPM2 devices, the second resource doesn't specify the I2C
10 - #address-cells : Should be one. The cell is the i2c device address with
12 - #size-cells : Should be zero.
13 - clock-frequency : Can be used to set the i2c clock frequency. If
14 unspecified, a default frequency of 60kHz is being used.
16 i2c drivers to find the bus to probe:
17 - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
18 the bus number is dynamically assigned by the i2c core.
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| /Linux-v5.15/Documentation/devicetree/bindings/gpio/ |
| D | aspeed,sgpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, edge-high, edge-low)
19 - Support reset tolerance option for each output port
20 - Directly connected to APB bus and its shift clock is from APB bus clock
22 - Co-work with external signal-chained TTL components (74LV165/74LV595)
27 - aspeed,ast2400-sgpio
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