Home
last modified time | relevance | path

Searched full:bitfield (Results 1 – 25 of 728) sorted by relevance

12345678910>>...30

/Linux-v5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_llh_internal.h15 /* COM Temperature Sense Reset Bitfield Definitions */
21 /* COM Temperature Sense Power Down Bitfield Definitions */
27 /* COM Temperature Sense Ready Bitfield Definitions */
33 /* COM Temperature Sense Ready Latch High Bitfield Definitions */
39 /* COM Temperature Sense Data Out [B:0] Bitfield Definitions */
50 /* register address for bitfield rx dma good octet counter lsw [1f:0] */
52 /* register address for bitfield rx dma good packet counter lsw [1f:0] */
54 /* register address for bitfield tx dma good octet counter lsw [1f:0] */
56 /* register address for bitfield tx dma good packet counter lsw [1f:0] */
59 /* register address for bitfield rx dma good octet counter msw [3f:20] */
[all …]
Dhw_atl_llh.c8 /* File hw_atl_llh.c: Definitions of bitfield and register access functions for
135 /* register address for bitfield imr_rx{r}_en */ in hw_atl_itr_irq_map_en_rx_set()
147 /* bitmask for bitfield imr_rx{r}_en */ in hw_atl_itr_irq_map_en_rx_set()
159 /* lower bit position of bitfield imr_rx{r}_en */ in hw_atl_itr_irq_map_en_rx_set()
176 /* register address for bitfield imr_tx{t}_en */ in hw_atl_itr_irq_map_en_tx_set()
188 /* bitmask for bitfield imr_tx{t}_en */ in hw_atl_itr_irq_map_en_tx_set()
200 /* lower bit position of bitfield imr_tx{t}_en */ in hw_atl_itr_irq_map_en_tx_set()
216 /* register address for bitfield imr_rx{r}[4:0] */ in hw_atl_itr_irq_map_rx_set()
228 /* bitmask for bitfield imr_rx{r}[4:0] */ in hw_atl_itr_irq_map_rx_set()
240 /* lower bit position of bitfield imr_rx{r}[4:0] */ in hw_atl_itr_irq_map_rx_set()
[all …]
/Linux-v5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2_llh_internal.h9 /* RX pif_rpf_redir_2_en_i Bitfield Definitions
19 /* RX pif_rpf_rss_hash_type_i Bitfield Definitions
27 /* rx rpf_new_rpf_en bitfield definitions
28 * preprocessor definitions for the bitfield "rpf_new_rpf_en_i".
32 /* register address for bitfield rpf_new_rpf_en */
34 /* bitmask for bitfield rpf_new_rpf_en */
36 /* inverted bitmask for bitfield rpf_new_rpf_en */
38 /* lower bit position of bitfield rpf_new_rpf_en */
40 /* width of bitfield rpf_new_rpf_en */
42 /* default value of bitfield rpf_new_rpf_en */
[all …]
/Linux-v5.10/drivers/gpu/drm/i2c/
Dch7006_priv.h142 #define __mask(src, bitfield) \ argument
143 (((2 << (1 ? bitfield)) - 1) & ~((1 << (0 ? bitfield)) - 1))
144 #define mask(bitfield) __mask(bitfield) argument
146 #define __bitf(src, bitfield, x) \ argument
147 (((x) >> (src) << (0 ? bitfield)) & __mask(src, bitfield))
148 #define bitf(bitfield, x) __bitf(bitfield, x) argument
149 #define bitfs(bitfield, s) __bitf(bitfield, bitfield##_##s) argument
150 #define setbitf(state, reg, bitfield, x) \ argument
151 state->regs[reg] = (state->regs[reg] & ~mask(reg##_##bitfield)) \
152 | bitf(reg##_##bitfield, x)
[all …]
/Linux-v5.10/include/linux/clk/
Dti.h36 * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg
37 * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg
40 * @control_reg: register containing the DPLL mode bitfield
41 * @enable_mask: mask of the DPLL mode bitfield in @control_reg
54 * @autoidle_reg: register containing the DPLL autoidle mode bitfield
55 * @idlest_reg: register containing the DPLL idle status bitfield
56 * @autoidle_mask: mask of the DPLL autoidle mode bitfield in @autoidle_reg
57 * @freqsel_mask: mask of the DPLL jitter correction bitfield in @control_reg
58 * @dcc_mask: mask of the DPLL DCC correction bitfield @mult_div1_reg
60 * @idlest_mask: mask of the DPLL idle status bitfield in @idlest_reg
[all …]
/Linux-v5.10/drivers/net/ethernet/aquantia/atlantic/macsec/
Dmacsec_api.h59 * rec - [IN] The bitfield values to write to the table row.
77 * rec - [IN] The bitfield values to write to the table row.
95 * rec - [IN] The bitfield values to write to the table row.
113 * rec - [IN] The bitfield values to write to the table row.
131 * rec - [IN] The bitfield values to write to the table row.
149 * rec - [IN] The bitfield values to write to the table row.
167 * rec - [IN] The bitfield values to write to the table row.
185 * rec - [IN] The bitfield values to write to the table row.
203 * rec - [IN] The bitfield values to write to the table row.
221 * rec - [IN] The bitfield values to write to the table row.
[all …]
/Linux-v5.10/drivers/staging/kpc2000/
Dkpc2000_spi.c131 } bitfield; member
147 } bitfield; member
155 } bitfield; member
277 sc.bitfield.wl = spidev->bits_per_word - 1; in kp_spi_setup()
278 sc.bitfield.cs = spidev->chip_select; in kp_spi_setup()
279 sc.bitfield.spi_en = 0; in kp_spi_setup()
280 sc.bitfield.trm = 0; in kp_spi_setup()
281 sc.bitfield.ffen = 0; in kp_spi_setup()
336 sc.bitfield.spi_en = 1; in kp_spi_transfer_one_message()
364 sc.bitfield.trm = KP_SPI_REG_CONFIG_TRM_TX; in kp_spi_transfer_one_message()
[all …]
/Linux-v5.10/drivers/mux/
Dmmio.c3 * MMIO register bitfield-controlled multiplexer driver
87 dev_err(dev, "bitfield %d: failed to read mux-reg-masks property: %d\n", in mux_mmio_probe()
97 dev_err(dev, "bitfield %d: invalid mask 0x%x\n", in mux_mmio_probe()
105 dev_err(dev, "bitfield %d: failed allocate: %d\n", in mux_mmio_probe()
117 dev_err(dev, "bitfield: %d: out of range idle state %d\n", in mux_mmio_probe()
140 MODULE_DESCRIPTION("MMIO register bitfield-controlled multiplexer driver");
DKconfig49 tristate "MMIO/Regmap register bitfield-controlled Multiplexer"
52 MMIO/Regmap register bitfield-controlled Multiplexer controller.
/Linux-v5.10/include/linux/
Dbitfield.h14 * Bitfield access macros
85 * FIELD_PREP() - prepare a bitfield element
90 * be combined with other fields of the bitfield using logical OR.
99 * FIELD_GET() - extract a bitfield element
101 * @_reg: value of entire bitfield
104 * bitfield passed in as @_reg by masking and shifting it down.
114 extern void __compiletime_error("bad bitfield mask")
Djournal-head.h41 * NOTE: We *cannot* combine this with b_modified into a bitfield
43 * very unuseful) make 64-bit accesses to the bitfield and clobber
44 * b_jcount if its update races with bitfield modification.
/Linux-v5.10/drivers/media/test-drivers/vidtv/
Dvidtv_psi.c102 ret = be16_to_cpu(h->bitfield) & mask; in vidtv_psi_get_sec_len()
113 ret = be16_to_cpu(p->bitfield) & mask; in vidtv_psi_get_pat_program_pid()
124 ret = be16_to_cpu(s->bitfield) & mask; in vidtv_psi_pmt_stream_get_elem_pid()
128 static void vidtv_psi_set_desc_loop_len(__be16 *bitfield, u16 new_len, in vidtv_psi_set_desc_loop_len() argument
136 new = cpu_to_be16((be16_to_cpu(*bitfield) & mask) | new_len); in vidtv_psi_set_desc_loop_len()
137 *bitfield = new; in vidtv_psi_set_desc_loop_len()
148 new = cpu_to_be16((be16_to_cpu(h->bitfield) & mask) | new_len); in vidtv_psi_set_sec_len()
156 h->bitfield = new; in vidtv_psi_set_sec_len()
169 .bitfield = cpu_to_be16((args->new_psi_section << 14) | args->pid), in vidtv_psi_ts_psi_write_into()
852 vidtv_psi_set_desc_loop_len(&s->bitfield, desc_loop_len, 12); in vidtv_psi_sdt_table_update_sec_len()
[all …]
Dvidtv_psi.h151 __be16 bitfield; /* syntax: 1, zero: 1, one: 2, section_length: 13 */ member
167 __be16 bitfield; /* reserved: 3, program_map_pid/network_pid: 13 */ member
191 __be16 bitfield; /* running_status: 3, free_ca:1, desc_loop_len:12 */ member
232 __be16 bitfield; /* reserved: 3, elementary_pid: 13 */ member
244 __be16 bitfield; /* reserved:3, pcr_pid: 13 */ member
647 * @bitfield: Contains the descriptor loop length
655 __be16 bitfield; /* desc_len: 12, reserved: 4 */ member
664 * @bitfield: Contains the network descriptor length
672 __be16 bitfield; /* network_desc_len: 12, reserved:4 */ member
725 __be16 bitfield; /* desc_length: 12, free_CA_mode: 1, running_status: 1 */ member
/Linux-v5.10/Documentation/devicetree/bindings/mux/
Dreg-mux.txt1 Generic register bitfield-based multiplexer controller bindings
11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
20 bitfield described by the corresponding register offset and bitfield mask
/Linux-v5.10/drivers/fpga/
Ddfl.h17 #include <linux/bitfield.h>
69 /* Device Feature Header Register Bitfield */
81 /* Next AFU Register Bitfield */
94 /* FME Fab Capability Register Bitfield */
106 /* FME Port Offset Register Bitfield */
120 /* FME Error Capability Register Bitfield */
137 /* Port Capability Register Bitfield */
142 /* Port Control Register Bitfield */
148 /* Port Status Register Bitfield */
160 /* Port Error Capability Register Bitfield */
[all …]
/Linux-v5.10/tools/testing/selftests/bpf/progs/
Dcore_reloc_types.h713 /* bitfield read results, all as plain integers */
751 /* turn bitfield into non-bitfield and vice versa */
753 uint64_t ub1; /* 3 -> 64 non-bitfield */
754 uint8_t ub2; /* 20 -> 8 non-bitfield */
755 int64_t ub7 __bpf_aligned; /* 7 -> 64 non-bitfield signed */
756 int64_t sb4 __bpf_aligned; /* 4 -> 64 non-bitfield signed */
757 uint64_t sb20 __bpf_aligned; /* 20 -> 16 non-bitfield unsigned */
758 int32_t u32: 20; /* 32 non-bitfield -> 20 bitfield */
759 uint64_t s32: 60 __bpf_aligned; /* 32 non-bitfield -> 60 bitfield */
Dbtf_dump_test_case_bitfields.c4 * BTF-to-C dumper tests for bitfield.
59 short b; /* combined with previous bitfield */
64 int e; /* combined with previous bitfield */
/Linux-v5.10/arch/arm/mach-vexpress/
Dspc.c106 * It corresponds to A15 processors MPIDR[15:8] bitfield
154 * @cluster: mpidr[15:8] bitfield describing cluster affinity level
155 * @cpu: mpidr[7:0] bitfield describing cpu affinity level
183 * @cluster: mpidr[15:8] bitfield describing cluster affinity level
184 * @cpu: mpidr[7:0] bitfield describing cpu affinity level
209 * @cluster: mpidr[15:8] bitfield describing cluster affinity level
233 * @cpu: mpidr[7:0] bitfield describing CPU affinity level within cluster
234 * @cluster: mpidr[15:8] bitfield describing cluster affinity level
/Linux-v5.10/arch/arm/mach-omap2/
Dcm33xx.c33 * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
87 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
91 * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
107 * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
121 * _clktrctrl_write - write @c to a CM_CLKSTCTRL.CLKTRCTRL register bitfield
122 * @c: CLKTRCTRL register bitfield (LSB = bit 0, i.e., unshifted)
Dpowerdomain.h93 * @logicretstate_mask: (AM33XX only) mask for logic retention bitfield
95 * @mem_on_mask: (AM33XX only) mask for mem on bitfield in @pwrstctrl_offs
96 * @mem_ret_mask: (AM33XX only) mask for mem ret bitfield in @pwrstctrl_offs
97 * @mem_pwrst_mask: (AM33XX only) mask for mem state bitfield in @pwrstst_offs
98 * @mem_retst_mask: (AM33XX only) mask for mem retention state bitfield
/Linux-v5.10/drivers/mfd/
Ducb1x00-core.c37 * @in: bitfield of IO pins to be set as inputs
38 * @out: bitfield of IO pins to be set as outputs
41 * the UCB1x00 chip. The @in bitfield has priority over the
42 * @out bitfield, in that if you specify a pin as both input
65 * @set: bitfield of IO pins to set to logic '1'
66 * @clear: bitfield of IO pins to set to logic '0'
70 * The @clear bitfield has priority over the @set bitfield -
94 * Return a bitfield describing the logic state of the ten
/Linux-v5.10/drivers/usb/chipidea/
Dci.h320 * @mask: bitfield mask
333 * @mask: bitfield mask
350 * @mask: bitfield mask
383 * @mask: bitfield mask
400 * @mask: bitfield mask
417 * @mask: bitfield mask
/Linux-v5.10/drivers/soc/bcm/brcmstb/pm/
Dpm.h33 /* PM_CTRL bitfield (Method #0) */
42 /* PM_CTRL bitfield (Method #1) */
/Linux-v5.10/Documentation/trace/coresight/
Dcoresight-etm4x-reference.rst30 ``echo bitfield > mode``
32 bitfield up to 32 bits setting trace features.
284 ``echo bitfield > ns_exlevel_viinst``
286 Where bitfield contains bits to set clear for EL0 to EL2
519 ``echo bitfield > event_instren``
521 Where bitfield is up to 4 bits according to number of event fields.
634 This is a bitfield selection parameter that sets the overall trace mode for the
/Linux-v5.10/include/uapi/linux/
Dbtf.h119 * contains both member bitfield size and bit offset. The
120 * bitfield size is set for bitfield members. If the type

12345678910>>...30