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/Linux-v5.10/Documentation/devicetree/bindings/usb/
Dgeneric-ohci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 const: generic-ohci
34 In case the Renesas R-Car Gen3 SoCs:
35 - if a host only channel: first clock should be host.
36 - if a USB DRD channel: first clock should be host and second
[all …]
Dgeneric-ehci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: "usb-hcd.yaml"
14 - if:
19 const: ibm,usb-ehci-440epx
28 const: generic-ehci
45 In case the Renesas R-Car Gen3 SoCs:
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/Linux-v5.10/arch/mips/include/asm/sgi/
Dhpc3.h22 #define HPCDMA_EOX 0x80000000 /* last desc in chain for tx */
23 #define HPCDMA_EOR 0x80000000 /* last desc in chain for rx */
26 #define HPCDMA_XIE 0x20000000 /* irq generated when at end of this desc */
39 volatile u32 pbdma_dptr; /* pbus dma channel desc ptr */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
48 #define HPC3_PDMACTRL_SEL 0x00000002 /* little endian transfer */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
73 #define HPC3_SCTRL_ENDIAN 0x02 /* DMA endian mode, 0=big 1=little */
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/Linux-v5.10/drivers/usb/host/
Dehci-ppc-of.c1 // SPDX-License-Identifier: GPL-1.0+
5 * Bus Glue for PPC On-Chip EHCI driver on the of_platform bus
10 * Based on "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
85 return -EINVAL; in ppc44x_enable_bmt()
96 struct device_node *dn = op->dev.of_node; in ehci_hcd_ppc_of_probe()
106 return -ENODEV; in ehci_hcd_ppc_of_probe()
108 dev_dbg(&op->dev, "initializing PPC-OF USB Controller\n"); in ehci_hcd_ppc_of_probe()
114 hcd = usb_create_hcd(&ehci_ppc_of_hc_driver, &op->dev, "PPC-OF USB"); in ehci_hcd_ppc_of_probe()
116 return -ENOMEM; in ehci_hcd_ppc_of_probe()
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Dohci-platform.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the OCHI-SSB driver
10 * Derived from the OHCI-PCI driver
12 * Copyright 2000-2002 David Brownell
18 #include <linux/dma-mapping.h>
36 #define hcd_to_ohci_priv(h) ((struct ohci_platform_priv *)hcd_to_ohci(h)->priv)
43 static const char hcd_name[] = "ohci-platform";
51 for (clk = 0; clk < OHCI_MAX_CLKS && priv->clks[clk]; clk++) { in ohci_platform_power_on()
52 ret = clk_prepare_enable(priv->clks[clk]); in ohci_platform_power_on()
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Dohci.h1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
27 /* first fields are hardware-specified */
49 struct ed *ed_prev; /* for non-interrupt EDs */
53 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
54 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
76 ((int) (ohci->wdh_cnt - ed->takeback_wdh_cnt) >= 0)
89 /* first fields are hardware-specified */
124 * big-endian PPC hardware that's the second entry.
132 struct td *td_hash; /* dma-->td hashtable */
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Dehci-platform.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
9 * Derived from the ohci-ssb driver
12 * Derived from the EHCI-PCI driver
13 * Copyright (c) 2000-2004 by David Brownell
15 * Derived from the ohci-pci driver
17 * Copyright 2000-2002 David Brownell
23 #include <linux/dma-mapping.h>
43 #define hcd_to_ehci_priv(h) ((struct ehci_platform_priv *)hcd_to_ehci(h)->priv)
57 static const char hcd_name[] = "ehci-platform";
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Dfotg210.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/usb/ehci-dbgp.h>
14 * To facilitate the strongest possible byte-order checking from "sparse"
33 /* fotg210_hcd->lock guards shared data against other CPUs:
59 * ehci-timer.c) in parallel with this list.
152 /* which ports have the change-suspend feature turned on */
161 /* per-HC memory pools (could be per-bus, but ...) */
195 return (struct fotg210_hcd *)(hcd->hcd_priv); in hcd_to_fotg210()
202 /*-------------------------------------------------------------------------*/
210 * some hosts treat caplength and hciversion as parts of a 32-bit
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/Linux-v5.10/drivers/staging/comedi/drivers/
Dni_usb6501.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Comedi driver for National Instruments USB-6501
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: National Instruments USB-6501 module
13 * Devices: [National Instruments] USB-6501 (ni_usb6501)
24 * NI-6501 - USB PROTOCOL DESCRIPTION
27 * - request (out)
28 * - response (in)
39 * byte 5 is the total packet length - 4
75 * RES: 00 01 00 10 00 0C 01 00 00 00 00 02 <u32 counter value, Big Endian>
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/Linux-v5.10/drivers/net/vmxnet3/
Dvmxnet3_defs.h4 * Copyright (C) 2008-2020, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-drivers@vmware.com
57 #define VMXNET3_REG_ALIGN 8 /* All registers are 8-byte aligned. */
104 * Little Endian layout of bitfields -
110 * Big Endian layout of bitfields -
116 * Thus, le32_to_cpu on the dword will allow the big endian driver to read
118 * bit fields written by big endian driver to format required by device.
370 /* # of tx desc needed for a tx buffer size */
371 #define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
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/Linux-v5.10/arch/sh/boards/mach-rsk/
Ddevices-rsk7203.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008 - 2010 Paul Mundt
42 .id = -1,
57 .default_trigger = "nand-disk",
79 .name = "leds-gpio",
80 .id = -1,
91 .desc = "SW1",
96 .desc = "SW2",
101 .desc = "SW3",
112 .name = "gpio-keys-polled",
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/Linux-v5.10/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_api_cmd.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
34 (1 << (fls(cell_size - 1))) : API_CMD_CELL_SIZE_MIN)
49 #define MASKED_IDX(chain, idx) ((idx) & ((chain)->num_cells - 1))
91 enum hinic_api_cmd_chain_type chain_type = chain->chain_type; in set_prod_idx()
92 struct hinic_hwif *hwif = chain->hwif; in set_prod_idx()
100 prod_idx |= HINIC_API_CMD_PI_SET(chain->prod_idx, IDX); in set_prod_idx()
109 addr = HINIC_CSR_API_CMD_STATUS_ADDR(chain->chain_type); in get_hw_cons_idx()
110 val = hinic_hwif_read_reg(chain->hwif, addr); in get_hw_cons_idx()
119 addr = HINIC_CSR_API_CMD_STATUS_ADDR(chain->chain_type); in dump_api_chain_reg()
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/Linux-v5.10/drivers/gpio/
Dgpio-brcmstb.c2 * Copyright (C) 2015-2017 Broadcom
71 #define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
77 return bank->parent_priv; in brcmstb_gpio_gc_to_priv()
83 void __iomem *reg_base = bank->parent_priv->reg_base; in __brcmstb_gpio_get_active_irqs()
85 return bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) & in __brcmstb_gpio_get_active_irqs()
86 bank->gc.read_reg(reg_base + GIO_MASK(bank->id)); in __brcmstb_gpio_get_active_irqs()
95 spin_lock_irqsave(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
97 spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags); in brcmstb_gpio_get_active_irqs()
105 return hwirq - (bank->gc.base - bank->parent_priv->gpio_base); in brcmstb_gpio_hwirq_to_offset()
111 struct gpio_chip *gc = &bank->gc; in brcmstb_gpio_set_imask()
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/Linux-v5.10/drivers/dma/
Dtxx9dmac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
17 * be configured for memory-memory or device-memory transfer, but only
18 * one channel can do alignment-free memory-memory transfer at a time
23 * make one dedicated channel for memory-memory transfer. The
56 * Redefine this macro to handle differences between 32- and 64-bit
57 * addressing, big vs. little endian, etc.
92 /* per-channel registers */
190 return ddev->have_64bit_regs; in __is_dmac64()
195 return __is_dmac64(dc->ddev); in is_dmac64()
199 /* Hardware descriptor definition. (for simple-chain) */
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Dfsl-edma-common.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (c) 2013-2014 Freescale Semiconductor, Inc
9 #include <linux/dma-mapping.h>
11 #include "fsl-edma-common.h"
47 struct edma_regs *regs = &fsl_chan->edma->regs; in fsl_edma_enable_request()
48 u32 ch = fsl_chan->vchan.chan.chan_id; in fsl_edma_enable_request()
50 if (fsl_chan->edma->drvdata->version == v1) { in fsl_edma_enable_request()
51 edma_writeb(fsl_chan->edma, EDMA_SEEI_SEEI(ch), regs->seei); in fsl_edma_enable_request()
52 edma_writeb(fsl_chan->edma, ch, regs->serq); in fsl_edma_enable_request()
54 /* ColdFire is big endian, and accesses natively in fsl_edma_enable_request()
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/Linux-v5.10/drivers/irqchip/
Dirq-bcm6345-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
39 * 0x1000_0050: CPU1_W0_STATUS IRQs 96-127
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/Linux-v5.10/drivers/usb/gadget/udc/
Dm66592-udc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2007 Renesas Solutions Corp.
20 #include "m66592-udc.h"
43 /*-------------------------------------------------------------------------*/
84 __releases(m66592->lock) in m66592_usb_disconnect()
85 __acquires(m66592->lock) in m66592_usb_disconnect()
93 m66592->gadget.speed = USB_SPEED_UNKNOWN; in m66592_usb_disconnect()
94 spin_unlock(&m66592->lock); in m66592_usb_disconnect()
95 m66592->driver->disconnect(&m66592->gadget); in m66592_usb_disconnect()
96 spin_lock(&m66592->lock); in m66592_usb_disconnect()
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Dfsl_usb2_udc.h1 // SPDX-License-Identifier: GPL-2.0+
19 /* USB DR device mode registers (Little Endian) */
46 u32 otgsc; /* On-The-Go Status and Control */
56 /* USB DR host mode registers (Little Endian) */
83 u32 otgsc; /* On-The-Go Status and Control */
93 /* non-EHCI USB system interface registers (Big Endian) */
139 /* bit 9-8 are async schedule park mode count */
146 /* bit 23-16 are interrupt threshold control */
213 /* bit 11-10 are line status */
220 /* bit 15-14 are port indicator control */
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/Linux-v5.10/sound/mips/
Dhal2.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Based on OSS code from Ladislav Michl <ladis@linux-mips.org>, which
12 #include <linux/dma-mapping.h>
24 #include <sound/pcm-indirect.h>
29 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
47 unsigned int ctrl; /* Current state of pbus->pbdma_ctrl */
51 struct hpc_dma_desc desc; member
61 struct hal2_desc *desc; member
87 #define H2_INDIRECT_WAIT(regs) while (hal2_read(&regs->isr) & H2_ISR_TSTATUS);
106 struct hal2_ctl_regs *regs = hal2->ctl_regs; in hal2_i_read32()
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/Linux-v5.10/fs/ext2/
Dialloc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Laboratoire MASI - Institut Blaise Pascal
10 * BSD ufs-inspired inode and directory allocation by
12 * Big-endian to little-endian byte-swapping/bitmaps by
18 #include <linux/backing-dev.h>
49 struct ext2_group_desc *desc; in read_inode_bitmap() local
52 desc = ext2_get_group_desc(sb, block_group, NULL); in read_inode_bitmap()
53 if (!desc) in read_inode_bitmap()
56 bh = sb_bread(sb, le32_to_cpu(desc->bg_inode_bitmap)); in read_inode_bitmap()
59 "Cannot read inode bitmap - " in read_inode_bitmap()
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/Linux-v5.10/include/linux/platform_data/
Ddma-ste-dma40.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2007-2010
4 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
5 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
20 * Size is in the units of addr-widths (1,2,4,8 bytes)
21 * Larger transfers will be split up to multiple linked desc
26 #define STEDMA40_DEV_DST_MEMORY (-1)
27 #define STEDMA40_DEV_SRC_MEMORY (-1)
49 /* The value 4 indicates that PEN-reg shall be set to 0 */
74 * struct stedma40_half_channel_info - dst/src channel configuration
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/Linux-v5.10/drivers/cpuidle/
Dcpuidle-pseries.c1 // SPDX-License-Identifier: GPL-2.0
3 * cpuidle-pseries - idle state cpuidle driver.
78 * were soft-disabled in check_and_cede_processor()
92 * "ibm,get-systems-parameter" RTAS call with the token
98 * table with all the parameters to ibm,get-system-parameters.
115 * -----------------------------
118 * -----------------------------
121 * -----------------------------
124 * | tb-ticks | |
125 * -----------------------------
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/Linux-v5.10/drivers/crypto/ccp/
Dccp-ops.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2019 Advanced Micro Devices, Inc.
11 #include <linux/dma-mapping.h>
19 #include "ccp-dev.h"
56 #define CCP_NEW_JOBID(ccp) ((ccp->vdata->version == CCP_VERSION(3, 0)) ? \
61 return atomic_inc_return(&ccp->current_id) & CCP_JOBID_MASK; in ccp_gen_jobid()
66 if (wa->dma_count) in ccp_sg_free()
67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir); in ccp_sg_free()
69 wa->dma_count = 0; in ccp_sg_free()
78 wa->sg = sg; in ccp_init_sg_workarea()
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/Linux-v5.10/drivers/net/wan/
Dwanxl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * - Only DTE (external clock) support with NRZ and NRZI encodings
10 * - wanXL100 will require minor driver modifications, no access to hw
29 #include <linux/dma-mapping.h>
42 /* MAILBOX #1 - PUTS COMMANDS */
45 #define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */
47 #define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */
50 /* MAILBOX #2 - DRAM SIZE */
58 int node; /* physical port #0 - 3 */
81 struct port ports[]; /* 1 - 4 port structures follow */
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/Linux-v5.10/arch/mips/ath25/
Dar2315_regs.h11 * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
81 #define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */
97 #define AR2315_ARB_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
106 #define AR2315_CONFIG_AHB 0x00000001 /* EC-AHB bridge endian */
108 #define AR2315_CONFIG_MPEGTS_RSVD 0x00000004 /* MPEG-TS byteswap */
110 #define AR2315_CONFIG_MEMCTL 0x00000010 /* Mem controller endian */
114 #define AR2315_CONFIG_CPU 0x00000400 /* CPU big endian */
128 /* Revision Register - Initial value is 0x3010 (WMAC 3.0, AR231X 1.0). */
172 #define AR2315_GISR_MPEGTS_RSVD 0x00000004 /* MPEG-TS */
303 * - No read or write buffers are included.
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