Searched full:beats (Results 1 – 20 of 20) sorted by relevance
61 transaction size can't exceed 16 beats (AxLEN[3:0]).68 transaction size can't exceed 16 beats (AxLEN[3:0]).
8 …e data channels between the core and the SCU. If both read and write data beats are transferred on…
96 inactive (high) between data beats of a burst write.
50 u32 beats = (qce->burst_size >> 3) - 1; in qce_config_reg() local54 config = (beats << REQ_SIZE_SHIFT) & REQ_SIZE_MASK; in qce_config_reg()
62 * @max_reads_beats: Max outstanding read bytes in 8-byte "beats" (if non-zero)
4 Linux beats them ALL! While all other OS's are TALKING about direct
245 Use Address-Aligned Beats
270 #define SDRAM_BL 8 /* # of beats in a burst */
81 #define COMPASS 100 /* beats per minute */
552 5) Enable Address Aligned Beats::
559 unit to use? Beats me. My way is to always pick the transfer
1109 /* O_PATH beats everything else. */ in build_open_how()
898 pr_debug("Missed timer beats: %" PRIu64 "\n", c-1); in perf_kvm__handle_timerfd()
315 * If number of beats fit in several whole bursts in stm32_dma_fifo_threshold_is_allowed()
469 * or a register with the amount of bursts/beats/bytes that have been
1036 * after first heart beats in firmware_download()
471 | #. But CPU 1 beats it to the punch, completing the current grace |
351 /* % beats absolute blocks */ in init_sc_pools_and_sizes()
887 * We have an aligned record that satisfies minlen and beats or matches in xfs_alloc_cur_check()
5341 * beats us to it, just free our copy and return. in kvmppc_alloc_host_rm_ops()