Home
last modified time | relevance | path

Searched +full:bcm7038 +full:- +full:l1 +full:- +full:intc (Results 1 – 18 of 18) sorted by relevance

/Linux-v6.6/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm7038-l1-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7038-l1-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM7038-style Level 1 interrupt controller
11 directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip
12 since BCM7038 has contained this hardware.
16 - 64, 96, 128, or 160 incoming level IRQ lines
18 - Most onchip peripherals are wired directly to an L1 input
20 - A separate instance of the register set for each CPU, allowing individual
[all …]
/Linux-v6.6/drivers/irqchip/
Dirq-bcm7038-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom BCM7038 style Level 1 interrupt controller driver
79 static inline unsigned int reg_status(struct bcm7038_l1_chip *intc, in reg_status() argument
82 return (0 * intc->n_words + word) * sizeof(u32); in reg_status()
85 static inline unsigned int reg_mask_status(struct bcm7038_l1_chip *intc, in reg_mask_status() argument
88 return (1 * intc->n_words + word) * sizeof(u32); in reg_mask_status()
91 static inline unsigned int reg_mask_set(struct bcm7038_l1_chip *intc, in reg_mask_set() argument
94 return (2 * intc->n_words + word) * sizeof(u32); in reg_mask_set()
97 static inline unsigned int reg_mask_clr(struct bcm7038_l1_chip *intc, in reg_mask_clr() argument
100 return (3 * intc->n_words + word) * sizeof(u32); in reg_mask_clr()
[all …]
Dirq-bcm6345-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * This is based on the BCM7038 (which supports SMP) but with a single
19 * 0x1000_0028: CPU0_W0_STATUS IRQs 31-63
20 * 0x1000_002c: CPU0_W1_STATUS IRQs 0-31
23 * 0x1000_0038: CPU1_W0_STATUS IRQs 31-63
24 * 0x1000_003c: CPU1_W1_STATUS IRQs 0-31
31 * 0x1000_0030: CPU0_W0_STATUS IRQs 96-127
32 * 0x1000_0034: CPU0_W1_STATUS IRQs 64-95
33 * 0x1000_0038: CPU0_W2_STATUS IRQs 32-63
34 * 0x1000_003c: CPU0_W3_STATUS IRQs 0-31
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
[all …]
/Linux-v6.6/arch/mips/bmips/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0-only
17 { .compatible = "brcm,bcm7038-l1-intc" },
18 { .compatible = "brcm,bcm6345-l1-intc" },
41 IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
/Linux-v6.6/arch/mips/boot/dts/brcm/
Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
[all …]
Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
[all …]
Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
[all …]
Dbcm63268.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm63268-clock.h"
4 #include "dt-bindings/reset/bcm63268-reset.h"
5 #include "dt-bindings/soc/bcm63268-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <200000000>;
32 periph_osc: periph-osc {
[all …]
Dbcm6358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6358-clock.h"
4 #include "dt-bindings/reset/bcm6358-reset.h"
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 mips-hpt-frequency = <150000000>;
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
[all …]
Dbcm6362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6362-clock.h"
4 #include "dt-bindings/reset/bcm6362-reset.h"
5 #include "dt-bindings/soc/bcm6362-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <200000000>;
32 periph_osc: periph-osc {
[all …]
Dbcm6328.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6328-clock.h"
4 #include "dt-bindings/reset/bcm6328-reset.h"
5 #include "dt-bindings/soc/bcm6328-pm.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
13 #address-cells = <1>;
14 #size-cells = <0>;
16 mips-hpt-frequency = <160000000>;
32 periph_osc: periph-osc {
[all …]
Dbcm6368.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm6368-clock.h"
4 #include "dt-bindings/reset/bcm6368-reset.h"
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 mips-hpt-frequency = <200000000>;
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
[all …]