Searched +full:bcm11351 +full:- +full:cpu +full:- +full:method (Results 1 – 4 of 4) sorted by relevance
2 * Copyright (C) 2012-2013 Broadcom Corporation14 #include <dt-bindings/interrupt-controller/arm-gic.h>15 #include <dt-bindings/interrupt-controller/irq.h>17 #include "dt-bindings/clock/bcm281xx.h"20 #address-cells = <1>;21 #size-cells = <1>;22 model = "BCM11351 SoC";23 compatible = "brcm,bcm11351";24 interrupt-parent = <&gic>;31 #address-cells = <1>;[all …]
14 #include <dt-bindings/interrupt-controller/arm-gic.h>15 #include <dt-bindings/interrupt-controller/irq.h>17 #include "dt-bindings/clock/bcm21664.h"20 #address-cells = <1>;21 #size-cells = <1>;24 interrupt-parent = <&gic>;31 #address-cells = <1>;32 #size-cells = <0>;34 cpu0: cpu@0 {35 device_type = "cpu";[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>14 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")15 defining properties for every cpu.17 Bindings for CPU nodes follow the Devicetree Specification, available from:21 with updates for 32-bit and 64-bit ARM systems provided in this document.30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in34 cpus and cpu node bindings definition[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) 2014-2015 Broadcom Corporation12 #include <linux/irqchip/irq-bcm2836.h>34 #define OF_SECONDARY_BOOT "secondary-boot-reg"54 return -ENXIO; in scu_a9_enable()61 return -ENOENT; in scu_a9_enable()68 return -ENOMEM; in scu_a9_enable()78 static u32 secondary_boot_addr_for(unsigned int cpu) in secondary_boot_addr_for() argument81 struct device_node *cpu_node = of_get_cpu_node(cpu, NULL); in secondary_boot_addr_for()84 pr_err("Failed to find device tree node for CPU%u\n", cpu); in secondary_boot_addr_for()[all …]
