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/Linux-v5.10/Documentation/devicetree/bindings/arm/
Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
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/Linux-v5.10/arch/arm/boot/dts/
Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "brcm,nsp";
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
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Dbcm4708.dtsi5 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
20 stdout-path = "serial0:115200n8";
24 #address-cells = <1>;
25 #size-cells = <0>;
26 enable-method = "brcm,bcm-nsp-smp";
30 compatible = "arm,cortex-a9";
31 next-level-cache = <&L2>;
37 compatible = "arm,cortex-a9";
38 next-level-cache = <&L2>;
39 secondary-boot-reg = <0xffff0400>;
/Linux-v5.10/arch/arm/mach-bcm/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2015 Broadcom Corporation
12 #include <linux/irqchip/irq-bcm2836.h>
18 #include <linux/smp.h>
21 #include <asm/smp.h>
34 #define OF_SECONDARY_BOOT "secondary-boot-reg"
54 return -ENXIO; in scu_a9_enable()
61 return -ENOENT; in scu_a9_enable()
68 return -ENOMEM; in scu_a9_enable()
106 return -EINVAL; in nsp_write_lut()
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