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Searched +full:asym +full:- +full:pause (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.1/include/uapi/linux/
Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
24 #define MII_STAT1000 0x0a /* 1000BASE-T status */
30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
55 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
58 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
60 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
63 #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
64 #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
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/Linux-v6.1/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
46 struct hclge_dev *hdev = bus->priv; in hclge_mdio_write()
50 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) in hclge_mdio_write()
51 return -EBUSY; in hclge_mdio_write()
57 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_write()
59 hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M, in hclge_mdio_write()
62 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_write()
63 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_write()
65 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_write()
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/Linux-v6.1/Documentation/devicetree/bindings/net/
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
20 local-mac-address:
23 $ref: /schemas/types.yaml#/definitions/uint8-array
27 mac-address:
32 local-mac-address property.
33 $ref: /schemas/types.yaml#/definitions/uint8-array
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/Linux-v6.1/drivers/net/ethernet/freescale/dpaa/
Ddpaa_ethtool.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * Copyright 2008 - 2016 Freescale Semiconductor Inc.
57 if (!net_dev->phydev) in dpaa_get_link_ksettings()
60 phy_ethtool_ksettings_get(net_dev->phydev, cmd); in dpaa_get_link_ksettings()
70 if (!net_dev->phydev) in dpaa_set_link_ksettings()
71 return -ENODEV; in dpaa_set_link_ksettings()
73 err = phy_ethtool_ksettings_set(net_dev->phydev, cmd); in dpaa_set_link_ksettings()
83 strscpy(drvinfo->driver, KBUILD_MODNAME, in dpaa_get_drvinfo()
84 sizeof(drvinfo->driver)); in dpaa_get_drvinfo()
85 strscpy(drvinfo->bus_info, dev_name(net_dev->dev.parent->parent), in dpaa_get_drvinfo()
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/Linux-v6.1/tools/testing/selftests/net/
Dvrf_route_leaking.sh2 # SPDX-License-Identifier: GPL-2.0
13 # +----+ .253 +----+ .253 +----+
14 # | h1 |-------------------| r1 |-------------------| h2 |
15 # +----+ .1 +----+ .2 +----+
42 # .253 +----+ .253
43 # +----| r1 |----+
44 # | +----+ |
45 # +----+ | | +----+
46 # | h1 |--------------+ +--------------| h2 |
47 # +----+ .1 | | .2 +----+
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/Linux-v6.1/drivers/net/mdio/
Dof_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * ethernet-phy-idAAAA.BBBB */
66 device_set_node(&mdiodev->dev, fwnode); in of_mdiobus_register_device()
71 device_set_node(&mdiodev->dev, NULL); in of_mdiobus_register_device()
77 dev_dbg(&mdio->dev, "registered mdio device %pOFn at address %i\n", in of_mdiobus_register_device()
89 { .compatible = "brcm,40nm-ephy" },
99 { .compatible = "moxa,moxart-rtl8201cp", },
105 * o Compatible string of "ethernet-phy-idX.X"
106 * o Compatible string of "ethernet-phy-ieee802.3-c45"
107 * o Compatible string of "ethernet-phy-ieee802.3-c22"
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/Linux-v6.1/drivers/net/phy/
Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
29 #include <linux/pse-pd/pse.h>
206 put_device(&phydev->mdio.dev); in phy_device_free()
220 fwnode_handle_put(dev->fwnode); in phy_device_release()
239 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
241 struct net_device *netdev = phydev->attached_dev; in mdio_bus_phy_may_suspend()
243 if (!drv || !phydrv->suspend) in mdio_bus_phy_may_suspend()
247 * suspended as part of a prior call to phy_disconnect() -> in mdio_bus_phy_may_suspend()
248 * phy_detach() -> phy_suspend() because the parent netdev might be the in mdio_bus_phy_may_suspend()
254 if (netdev->wol_enabled) in mdio_bus_phy_may_suspend()
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Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
40 * struct phylink - internal data type for phylink
56 u8 link_port; /* The current non-phy ethtool port */
87 if ((pl)->config->type == PHYLINK_NETDEV) \
88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
89 else if ((pl)->config->type == PHYLINK_DEV) \
90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
102 if ((pl)->config->type == PHYLINK_NETDEV) \
103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
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/Linux-v6.1/drivers/net/
Dsungem_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
10 * - Add support for PHYs that provide an IRQ line
11 * - Eventually moved the entire polling state machine in
14 * - On LXT971 & BCM5201, Apple uses some chip specific regs
17 * - Apple has some additional power management code for some
49 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read()
54 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write()
59 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read()
64 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write()
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/Linux-v6.1/drivers/net/ethernet/atheros/alx/
Dreg.h374 /* Size = tx-packet(1522) + IPG(12) + SOF(8) + 64(Pause) + IPG(12) + SOF(8) +
375 * rx-packet(1522) + delay-of-link(64)
490 /* re-send assert msg if SW no response */
522 /* bit23: adv Pause */
524 /* bit22: adv Asym Pause */
/Linux-v6.1/drivers/net/dsa/microchip/
Dksz8795.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/platform_data/microchip-ksz.h>
31 regmap_update_bits(dev->regmap[0], addr, bits, set ? bits : 0); in ksz_cfg()
37 regmap_update_bits(dev->regmap[0], PORT_CTRL_ADDR(port, offset), in ksz_port_cfg()
47 regs = dev->info->regs; in ksz8_ind_write8()
49 mutex_lock(&dev->alu_mutex); in ksz8_ind_write8()
56 mutex_unlock(&dev->alu_mutex); in ksz8_ind_write8()
121 masks = dev->info->masks; in ksz8_r_mib_cnt()
122 regs = dev->info->regs; in ksz8_r_mib_cnt()
124 ctrl_addr = addr + dev->info->reg_mib_cnt * port; in ksz8_r_mib_cnt()
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/Linux-v6.1/drivers/net/ethernet/aquantia/atlantic/
Daq_nic.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; in aq_nic_rss_init()
58 rss_params = &cfg->aq_rss; in aq_nic_rss_init()
60 rss_params->hash_secret_key_size = sizeof(rss_key); in aq_nic_rss_init()
61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); in aq_nic_rss_init()
62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; in aq_nic_rss_init()
64 for (i = rss_params->indirection_table_size; i--;) in aq_nic_rss_init()
65 rss_params->indirection_table[i] = i & (num_rss_queues - 1); in aq_nic_rss_init()
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/Linux-v6.1/drivers/net/ethernet/renesas/
Dravb_main.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2019 Renesas Electronics Corporation
6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
14 #include <linux/dma-mapping.h>
68 return -ETIMEDOUT; in ravb_wait()
89 switch (priv->speed) { in ravb_set_rate_gbeth()
106 switch (priv->speed) { in ravb_set_rate_rcar()
118 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1); in ravb_set_buffer_align()
121 skb_reserve(skb, RAVB_ALIGN - reserve); in ravb_set_buffer_align()
155 ravb_modify(priv->ndev, PIR, mask, set ? mask : 0); in ravb_mdio_ctrl()
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/Linux-v6.1/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
262 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
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