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/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Daspeed-lpc.txt2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
7 primary use case of the Aspeed LPC controller is as a slave on the bus
11 The LPC controller is represented as a multi-function device to account for the
14 "basically compatible with the [LPC registers from the] popular BMC controller
17 here labeled the "host" portion of the controller, includes, but is not limited
22 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
23 physical properties of some LPC pins, configuration of serial IRQs, and
24 APB-to-LPC bridging amonst other functions.
26 * An LPC Host Interface Controller: Manages functions exposed to the host such
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/Linux-v5.10/Documentation/devicetree/bindings/ipmi/
Daspeed-kcs-bmc.txt3 The Aspeed SOCs (AST2400 and AST2500) are commonly used as BMCs
5 used to perform in-band IPMI communication with their host.
9 - compatible : should be one of
10 "aspeed,ast2400-kcs-bmc"
11 "aspeed,ast2500-kcs-bmc"
12 - interrupts : interrupt generated by the controller
13 - kcs_chan : The LPC channel number in the controller
14 - kcs_addr : The host CPU IO map address
18 - compatible : should be one of
19 "aspeed,ast2400-kcs-bmc-v2"
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/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Daspeed,ast2500-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2500 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
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/Linux-v5.10/drivers/soc/aspeed/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
12 Control Aspeed ast2400/2500 HOST LPC to BMC mappings through
14 region where the host LPC read/write region can be buffered.
17 tristate "Aspeed ast2500 HOST LPC snoop support"
20 Provides a driver to control the LPC snoop interface which
22 the host to an arbitrary LPC I/O port.
26 tristate "Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC bridge control"
28 Control Aspeed ast2400/2500 HOST P2A VGA MMIO to BMC mappings through
30 a pre-defined region.
Daspeed-lpc-snoop.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Provides a simple driver to control the ASPEED LPC snoop interface which
7 * the host to an arbitrary LPC I/O port.
9 * Typically used by the BMC to "watch" host boot progress via port
26 #define DEVICE_NAME "aspeed-lpc-snoop"
55 /* The ast2400 has bits 14 and 15 as reserved, whereas the ast2500
75 return container_of(file->private_data, in snoop_file_to_chan()
87 if (kfifo_is_empty(&chan->fifo)) { in snoop_file_read()
88 if (file->f_flags & O_NONBLOCK) in snoop_file_read()
89 return -EAGAIN; in snoop_file_read()
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Daspeed-lpc-ctrl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/aspeed-lpc-ctrl.h>
18 #define DEVICE_NAME "aspeed-lpc-ctrl"
39 return container_of(file->private_data, struct aspeed_lpc_ctrl, in file_aspeed_lpc_ctrl()
46 unsigned long vsize = vma->vm_end - vma->vm_start; in aspeed_lpc_ctrl_mmap()
47 pgprot_t prot = vma->vm_page_prot; in aspeed_lpc_ctrl_mmap()
49 if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size) in aspeed_lpc_ctrl_mmap()
50 return -EINVAL; in aspeed_lpc_ctrl_mmap()
55 if (remap_pfn_range(vma, vma->vm_start, in aspeed_lpc_ctrl_mmap()
56 (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff, in aspeed_lpc_ctrl_mmap()
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/Linux-v5.10/arch/arm/boot/dts/
Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
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Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
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Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
21 stdout-path = &uart5;
25 compatible = "gpio-leds";
35 iio-hwmon {
36 compatible = "iio-hwmon";
37 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
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Daspeed-bmc-facebook-tiogapass.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
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/Linux-v5.10/drivers/char/ipmi/
Dkcs_bmc_aspeed.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
26 #define DEVICE_NAME "ast-kcs-bmc"
30 /* mapped to lpc-bmc@0 IO space */
56 /* mapped to lpc-host@80 IO space */
76 rc = regmap_read(priv->map, reg, &val); in aspeed_kcs_inb()
87 rc = regmap_write(priv->map, reg, data); in aspeed_kcs_outb()
109 switch (kcs_bmc->channel) { in aspeed_kcs_set_address()
111 regmap_update_bits(priv->map, LPC_HICR4, in aspeed_kcs_set_address()
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/Linux-v5.10/drivers/mtd/spi-nor/controllers/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
10 the host firmware. The implementation only supports SPI NOR.
24 Enable support for the NXP LPC SPI Flash Interface controller.
47 will be called intel-spi-pci.
64 will be called intel-spi-platform.
/Linux-v5.10/drivers/clk/
Dclk-aspeed.c1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
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/Linux-v5.10/drivers/tty/serial/8250/
D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
50 * controller) and one is on the host CPU side.
52 * It allows the BMC to provide to the host a "UART" that pipes into
58 * at what IO port and interrupt number the host side will appear
59 * to the host on the Host <-> BMC LPC bus. It could be different on a
69 addr = (readb(vuart->regs + ASPEED_VUART_ADDRH) << 8) | in lpc_address_show()
70 (readb(vuart->regs + ASPEED_VUART_ADDRL)); in lpc_address_show()
72 return snprintf(buf, PAGE_SIZE - 1, "0x%x\n", addr); in lpc_address_show()
87 writeb(val >> 8, vuart->regs + ASPEED_VUART_ADDRH); in lpc_address_store()
88 writeb(val >> 0, vuart->regs + ASPEED_VUART_ADDRL); in lpc_address_store()
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/Linux-v5.10/drivers/hwmon/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 sensors-detect script from the lm_sensors package. Read
21 <file:Documentation/hwmon/userspace-tools.rst> for details.
52 will be called abx500-temp.
267 will be called as370-hwmon.
290 will be called axi-fan-control
299 lm-sensors 2.10.1 for proper userspace support.
348 Only Intel-based Apple's computers are supported (MacBook Pro,
355 the laptop to act as a pinball machine-esque joystick.
370 will be called scmi-hwmon.
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/Linux-v5.10/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
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/Linux-v5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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