Searched +full:assigned +full:- +full:clocks +full:- +full:parents (Results 1 – 25 of 438) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/phy/ |
D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - ti,j721e-wiz-16g 17 - ti,j721e-wiz-10g 18 - ti,am64-wiz-10g 19 - ti,j7200-wiz-10g [all …]
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D | mixel,mipi-dsi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Guido Günther <agx@sigxcpu.org> 13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the 14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the 18 in either MIPI-DSI PHY mode or LVDS PHY mode. 23 - fsl,imx8mq-mipi-dphy 24 - fsl,imx8qxp-mipi-dphy [all …]
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D | ti,phy-am654-serdes.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Kishon Vijay Abraham I <kishon@ti.com> 19 - ti,phy-am654-serdes 24 reg-names: 26 - const: serdes 28 power-domains: 31 clocks: [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | imx7ulp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/clock/imx7ulp-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx7ulp-pinfunc.h" 15 interrupt-parent = <&intc>; 17 #address-cells = <1>; 18 #size-cells = <1>; 37 #address-cells = <1>; [all …]
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D | exynos4412-odroid-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards 7 #include <dt-bindings/sound/samsung-i2s.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 11 #include "exynos4412-ppmu-common.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include "exynos-mfc-reserved-memory.dtsi" 17 stdout-path = &serial_1; 21 compatible = "samsung,secure-firmware"; [all …]
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D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/clock/at91.h> 15 #include <dt-bindings/dma/at91.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/mfd/at91-usart.h> 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/sound/ |
D | nvidia,tegra-audio-graph-card.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Jon Hunter <jonathanh@nvidia.com> 16 - Sameer Pujar <spujar@nvidia.com> 19 - $ref: audio-graph.yaml# 24 - nvidia,tegra210-audio-graph-card 25 - nvidia,tegra186-audio-graph-card 27 clocks: [all …]
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D | nvidia,tegra210-ahub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 for audio pre-processing, post-processing and a programmable full 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 22 pattern: "^ahub@[0-9a-f]*$" 26 - enum: 27 - nvidia,tegra210-ahub [all …]
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D | nvidia,tegra210-dmic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Jon Hunter <jonathanh@nvidia.com> 17 - Sameer Pujar <spujar@nvidia.com> 20 - $ref: name-prefix.yaml# 24 pattern: "^dmic@[0-9a-f]*$" 28 - const: nvidia,tegra210-dmic 29 - items: [all …]
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D | nvidia,tegra186-dspk.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra186-dspk.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 Density Modulation (PDM) transmitter that up-samples the input to 13 over sampled Pulse Code Modulation (PCM) input to the desired 1-bit 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 21 - $ref: name-prefix.yaml# 25 pattern: "^dspk@[0-9a-f]*$" [all …]
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D | nvidia,tegra210-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The Inter-IC Sound (I2S) controller implements full-duplex, 11 bi-directional and single direction point-to-point serial 16 - Jon Hunter <jonathanh@nvidia.com> 17 - Sameer Pujar <spujar@nvidia.com> 20 - $ref: name-prefix.yaml# 24 pattern: "^i2s@[0-9a-f]*$" [all …]
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D | brcm,cygnus-audio.txt | 4 - compatible : "brcm,cygnus-audio" 5 - #address-cells: 32bit valued, 1 cell. 6 - #size-cells: 32bit valued, 0 cell. 7 - reg : Should contain audio registers location and length 8 - reg-names: names of the registers listed in "reg" property 12 - clocks: PLL and leaf clocks used by audio ports 13 - assigned-clocks: PLL and leaf clocks 14 - assigned-clock-parents: parent clocks of the assigned clocks 16 - assigned-clock-rates: List of clock frequencies of the 17 assigned clocks [all …]
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/Linux-v6.1/drivers/clk/ |
D | clk-conf.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/clk-provider.h> 9 #include <linux/clk/clk-conf.h> 20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents() 21 "#clock-cells"); in __set_clk_parents() 22 if (num_parents == -EINVAL) in __set_clk_parents() 23 pr_err("clk: invalid value of clock-parents property at %pOF\n", in __set_clk_parents() 27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents() 28 "#clock-cells", index, &clkspec); in __set_clk_parents() 31 if (rc == -ENOENT) in __set_clk_parents() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/media/ |
D | mediatek,vcodec-encoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 - mediatek,mt8173-vcodec-enc-vp8 21 - mediatek,mt8173-vcodec-enc 22 - mediatek,mt8183-vcodec-enc 23 - mediatek,mt8188-vcodec-enc 24 - mediatek,mt8192-vcodec-enc [all …]
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D | mediatek,vcodec-subdev-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: "http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#" 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 +------------------------------------------------+-------------------------------------+ 22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output | 24 +------------||-------------||-------------------+---------------------||--------------+ 26 -------------||-------------||-------------------|---------------------||--------------- 27 ||<------------||----------------HW index---------------->|| <child> [all …]
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D | mediatek,vcodec-decoder.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/mediatek,vcodec-decoder.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yunfei Dong <yunfei.dong@mediatek.com> 20 - mediatek,mt8173-vcodec-dec 21 - mediatek,mt8183-vcodec-dec 29 clocks: 32 clock-names: 34 - const: vcodecpll [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/ufs/ |
D | ti,j721e-ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vignesh Raghavendra <vigneshr@ti.com> 15 - const: ti,j721e-ufs 21 clocks: 23 description: phandle to the M-PHY clock 25 power-domains: 28 assigned-clocks: [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/rtc/ |
D | st,stm32-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com> 15 - st,stm32-rtc 16 - st,stm32h7-rtc 17 - st,stm32mp1-rtc 22 clocks: 26 clock-names: [all …]
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/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 11 #include "imx8ulp-pinfunc.h" 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 33 #address-cells = <2>; [all …]
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D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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D | imx8mm-tqma8mqml-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mm-tqma8mqml.dtsi" 12 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx"; 13 compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 24 reg_usdhc2_vmmc: regulator-vmmc { 25 compatible = "regulator-fixed"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; [all …]
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D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 10 #include <dt-bindings/mux/ti-serdes.h> 13 cmn_refclk: clock-cmnrefclk { 14 #clock-cells = <0>; 15 compatible = "fixed-clock"; 16 clock-frequency = <0>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/display/msm/ |
D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 - $ref: "../dsi-controller.yaml#" 18 - qcom,mdss-dsi-ctrl 19 - qcom,dsi-ctrl-6g-qcm2290 24 reg-names: 30 clocks: [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/pwm/ |
D | imx-tpm-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/imx-tpm-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Anson Huang <anson.huang@nxp.com> 17 - $ref: pwm.yaml# 20 "#pwm-cells": 25 - fsl,imx7ulp-pwm 30 assigned-clocks: 33 assigned-clock-parents: [all …]
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