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/Linux-v6.1/Documentation/devicetree/bindings/gpio/
Dgpio-mvebu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell EBU GPIO controller
10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 - Andrew Lunn <andrew@lunn.ch>
16 - enum:
17 - marvell,armada-8k-gpio
18 - marvell,orion-gpio
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/arm/marvell/
Dap80x-system-controller.txt1 Marvell Armada AP80x System Controller
4 The AP806/AP807 is one of the two core HW blocks of the Marvell Armada
5 7K/8K/931x SoCs. It contains system controllers, which provide several
6 registers giving access to numerous features: clocks, pin-muxing and
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the AP80x system controller
18 -------
24 - 0: reference clock of CPU cluster 0
25 - 1: reference clock of CPU cluster 1
26 - 2: fixed PLL at 1200 Mhz
[all …]
Dcp110-system-controller.txt1 Marvell Armada CP110 System Controller
4 The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K
6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gatable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gatable
[all …]
/Linux-v6.1/arch/arm64/boot/dts/marvell/
Darmada-cp11x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device Tree file for Marvell Armada CP11x.
8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
9 #include <dt-bindings/thermal/thermal.h>
11 #include "armada-common.dtsi"
27 thermal-zones {
28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
[all …]
Darmada-ap80x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device Tree file for Marvell Armada AP80x.
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <2>;
25 compatible = "arm,psci-0.2";
29 reserved-memory {
30 #address-cells = <2>;
[all …]
Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Device Tree file for SolidRun's ClearFog GT 8K
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
15 model = "SolidRun ClearFog GT 8K";
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
[all …]
/Linux-v6.1/drivers/pinctrl/mvebu/
Dpinctrl-armada-cp110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell Armada CP110 pinctrl driver based on mvebu pinctrl core
19 #include "pinctrl-mvebu.h"
24 * - In Armada7K (single CP) almost all the MPPs are available (except the
26 * - In Armada8K (dual CP) the MPPs are split into 2 parts, MPPs 0-31 from
27 * CPS, and MPPs 32-62 from CPM, the below flags (V_ARMADA_8K_CPM,
42 MPP_FUNCTION(0, "gpio", NULL),
49 MPP_FUNCTION(8, "uart0", "rxd"),
53 MPP_FUNCTION(0, "gpio", NULL),
60 MPP_FUNCTION(8, "uart0", "txd"),
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/Linux-v6.1/Documentation/arm/
Dmarvell.rst13 ------------
16 - 88F5082
17 - 88F5181
18 - 88F5181L
19 - 88F5182
21 …- Datasheet: https://web.archive.org/web/20210124231420/http://csclub.uwaterloo.ca/~board/ts7800/M…
22 …- Programmer's User Guide: https://web.archive.org/web/20210124231536/http://csclub.uwaterloo.ca/~…
23 …- User Manual: https://web.archive.org/web/20210124231631/http://csclub.uwaterloo.ca/~board/ts7800…
24 …- Functional Errata: https://web.archive.org/web/20210704165540/https://www.digriz.org.uk/ts78xx/8…
25 - 88F5281
[all …]
/Linux-v6.1/drivers/gpio/
Dgpio-mvebu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for Marvell SoCs
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * This driver is a fairly straightforward GPIO driver for the
13 * Kirkwood, Discovery, Armada 370/XP). The only complexity of this
15 * non-SMP platforms (Orion, Dove, Kirkwood, Armada 370) and the SMP
16 * platforms (MV78200 from the Discovery family and the Armada
17 * XP). Therefore, this driver handles three variants of the GPIO
19 * - the basic variant, called "orion-gpio", with the simplest
20 * register set. Used on Orion, Dove, Kirkwoord, Armada 370 and
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
126 include NAND flash controllers with built-in hardware ECC
161 - PXA3xx processors (NFCv1)
162 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2)
163 - 64-bit Aramda platforms (7k, 8k) (NFCv2)
243 Controller Module with built-in hardware ECC capabilities.
255 with built-in hardware ECC capabilities.
265 processor localbus with User-Programmable Machine support.
274 The driver supports a maximum 2k page size. With 2k pages and
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
11 model = "Marvell Armada 88AP510 SoC";
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
[all …]
/Linux-v6.1/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
98 tristate "Marvell Armada 3700 SPI Controller"
102 Marvell Armada 3700 SoCs.
138 supports spi-mem interface.
205 With a few GPIO pins, your system can bitbang the SPI protocol.
206 Select this to get SPI support through I/O pins (GPIO, parallel
[all …]
/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
78 8. Happy hacking.
81 ---------------------------------------------------
[all …]
/Linux-v6.1/Documentation/admin-guide/
Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
58 Documentation/firmware-guide/acpi/debug.rst for more information about
116 Format: <byte> or <bitmap-list>
[all …]