architecturally (full) in projects: Linux-v5.15

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Searched full:architecturally (Results 1 – 25 of 63) sorted by relevance

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/Linux-v5.15/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
D	instruction.json	66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t… 69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th… 72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.", 75 "BriefDescription": "This event counts architecturally executed floating-point move operations." 78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r… 81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re… 84 …"PublicDescription": "This event counts architecturally executed inter-element manipulation operat… 87 …"BriefDescription": "This event counts architecturally executed inter-element manipulation operati… 90 …"PublicDescription": "This event counts architecturally executed inter-register manipulation opera… 93 …"BriefDescription": "This event counts architecturally executed inter-register manipulation operat… [all …]
/Linux-v5.15/tools/perf/pmu-events/arch/arm64/
D	armv8-common-and-microarch.json	3 …"PublicDescription": "Instruction architecturally executed, Condition code check pass, software in… 6 …"BriefDescription": "Instruction architecturally executed, Condition code check pass, software inc… 39 "PublicDescription": "Instruction architecturally executed", 42 "BriefDescription": "Instruction architecturally executed" 51 …"PublicDescription": "Instruction architecturally executed, condition check pass, exception return… 54 … "BriefDescription": "Instruction architecturally executed, condition check pass, exception return" 57 …"PublicDescription": "Instruction architecturally executed, condition code check pass, write to CO… 60 …"BriefDescription": "Instruction architecturally executed, condition code check pass, write to CON… 135 …"PublicDescription": "Instruction architecturally executed, Condition code check pass, write to TT… 138 …"BriefDescription": "Instruction architecturally executed, Condition code check pass, write to TTB… [all …]
/Linux-v5.15/drivers/soc/qcom/
D	kryo-l2-accessors.c	`21 * Use architecturally required barriers for ordering between system register 41 * Use architecturally required barriers for ordering between system register`
/Linux-v5.15/Documentation/arm64/
D	amu.rst	`27 of four fixed and architecturally defined 64-bit event counters. 32 - Instructions retired: increments with every architecturally executed`
/Linux-v5.15/tools/perf/pmu-events/arch/arm64/ampere/emag/
D	instruction.json	`42 "PublicDescription": "Instruction architecturally executed, software increment",`
/Linux-v5.15/arch/arm/include/asm/
D	virt.h	`14 * architecturally defined flag bit here.`
/Linux-v5.15/tools/arch/ia64/include/asm/
D	barrier.h	`22 * architecturally visible effects of a memory access have occurred`
/Linux-v5.15/arch/x86/include/asm/
D	spec-ctrl.h	`11 * would be easier if SPEC_CTRL were architecturally maskable or`
D	debugreg.h	`103 dr7 &= ~0x400; /* architecturally set bit */ in local_db_save()`
/Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/
D	riscv,cpu-intc.txt	`13 timer interrupt comes from an architecturally mandated real-time timer that is`
/Linux-v5.15/arch/ia64/include/asm/
D	barrier.h	`20 * architecturally visible effects of a memory access have occurred`
/Linux-v5.15/Documentation/devicetree/bindings/arm/
D	coresight-cti.yaml	`37 architecturally connected CTI an additional compatible string is used to 235 # v8 architecturally defined CTI - CPU + ETM connections generated by the`
/Linux-v5.15/Documentation/devicetree/bindings/timer/
D	arm,arch_timer_mmio.yaml	`51 registers, which contain their architecturally-defined reset values. Only`
D	arm,arch_timer.yaml	`95 registers, which contain their architecturally-defined reset values. Only`
/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/
D	nvidia,tegra30-mc.yaml	`15 Tegra30 Memory Controller architecturally consists of the following parts:`
/Linux-v5.15/Documentation/x86/
D	entry_64.rst	`42 - Architecturally-defined exceptions like divide_error.`
/Linux-v5.15/drivers/hwtracing/coresight/
D	coresight-cti-platform.c	`17 /* Number of CTI signals in the v8 architecturally defined connection / 170 Create an architecturally defined v8 connection`
/Linux-v5.15/Documentation/virt/kvm/devices/
D	arm-vgic-v3.rst	`101 architecturally defined behavior to allow software a full view of the 124 The GICD_STATUSR and GICR_STATUSR registers are architecturally defined such`
/Linux-v5.15/arch/parisc/kernel/
D	vmlinux.lds.S	`112 /* Architecturally we need to keep __gp below 0x1000000 and thus`
/Linux-v5.15/tools/perf/pmu-events/arch/x86/silvermont/
D	pipeline.json	`94 …er of any mispredicted branch instructions retired. This umask is an architecturally defined event… 285 …ate by dividing the event count by the core frequency. This event is architecturally defined and i… 293 …he elapsed time while the core was not in halt state. This event is architecturally defined and i…`
/Linux-v5.15/arch/arm64/kernel/
D	kaslr.c	`105 * Mix in any entropy obtainable architecturally if enabled in kaslr_early_init()`
/Linux-v5.15/arch/arm/vdso/
D	vdsomunge.c	`6 * architecturally specified to be usable by both soft- and hard-float`
/Linux-v5.15/arch/mips/lib/
D	dump_tlb.c	`134 * We check both G bits, even though architecturally they should in dump_tlb()`
/Linux-v5.15/arch/powerpc/include/uapi/asm/
D	sigcontext.h	`53 * by an additional 32 double words. Architecturally the layout of`
/Linux-v5.15/arch/mips/kvm/
D	vz.c	3108 /* architecturally writable (e.g. from guest) / in kvm_vz_vcpu_setup() 3111 / architecturally read only, but maybe writable from root / in kvm_vz_vcpu_setup() 3117 / architecturally read only, but maybe writable from root / in kvm_vz_vcpu_setup() 3134 / architecturally writable (e.g. from guest) / in kvm_vz_vcpu_setup() 3136 / architecturally read only, but maybe writable from root / in kvm_vz_vcpu_setup() 3161 / architecturally writable (e.g. from guest) / in kvm_vz_vcpu_setup() 3169 / architecturally read only, but maybe writable from root */ in kvm_vz_vcpu_setup()

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