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/Linux-v6.1/drivers/clk/sprd/
Dsc9860-clk.c500 static SPRD_COMP_CLK(aon_apb, "aon-apb", aon_apb_parents, 0x230,
602 static SPRD_MUX_CLK(aon_i2c, "aon-i2c", cm3_i2c_parents, 0x280,
826 static SPRD_SC_GATE_CLK(avs_lit_eb, "avs-lit-eb", "aon-apb", 0x0,
828 static SPRD_SC_GATE_CLK(avs_big_eb, "avs-big-eb", "aon-apb", 0x0,
830 static SPRD_SC_GATE_CLK(ap_intc5_eb, "ap-intc5-eb", "aon-apb", 0x0,
832 static SPRD_SC_GATE_CLK(gpio_eb, "gpio-eb", "aon-apb", 0x0,
834 static SPRD_SC_GATE_CLK(pwm0_eb, "pwm0-eb", "aon-apb", 0x0,
836 static SPRD_SC_GATE_CLK(pwm1_eb, "pwm1-eb", "aon-apb", 0x0,
838 static SPRD_SC_GATE_CLK(pwm2_eb, "pwm2-eb", "aon-apb", 0x0,
840 static SPRD_SC_GATE_CLK(pwm3_eb, "pwm3-eb", "aon-apb", 0x0,
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mips/brcm/
Dsoc.txt21 = Always-On control block (AON CTRL)
28 "brcm,bcm7425-aon-ctrl"
29 "brcm,bcm7429-aon-ctrl"
30 "brcm,bcm7435-aon-ctrl" and
31 "brcm,brcmstb-aon-ctrl"
32 - reg : the register start and length for the AON CTRL block
37 compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";
/Linux-v6.1/drivers/clk/ti/
Dclk-33xx.c151 "l3-aon-clkctrl:0000:19",
152 "l3-aon-clkctrl:0000:30",
157 "l3-aon-clkctrl:0000:20",
167 "l3-aon-clkctrl:0000:22",
192 { AM3_L3_AON_DEBUGSS_CLKCTRL, am3_debugss_bit_data, CLKF_SW_SUP, "l3-aon-clkctrl:0000:24" },
244 DT_CLK(NULL, "dbg_clka_ck", "l3-aon-clkctrl:0000:30"),
245 DT_CLK(NULL, "dbg_sysclk_ck", "l3-aon-clkctrl:0000:19"),
250 DT_CLK(NULL, "stm_clk_div_ck", "l3-aon-clkctrl:0000:27"),
251 DT_CLK(NULL, "stm_pmd_clock_mux_ck", "l3-aon-clkctrl:0000:22"),
252 DT_CLK(NULL, "trace_clk_div_ck", "l3-aon-clkctrl:0000:24"),
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dbrcm,kona-ccu.txt60 "brcm,bcm11351-aon-ccu"
75 aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER
76 aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC
77 aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR
106 "brcm,bcm21664-aon-ccu"
120 aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER
Dqcom,aoncc-sm8250.yaml20 const: qcom,sm8250-lpass-aon
53 compatible = "qcom,sm8250-lpass-aon";
Dsprd,sc9860-clk.txt9 - "sprd,sc9860-aon-prediv"
11 - "sprd,sc9860-aon-gate"
Dsprd,sc9863a-clk.yaml22 - sprd,sc9863a-aon-clk
61 - sprd,sc9863a-aon-clk
/Linux-v6.1/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra186-gpio.yaml14 Tegra186 contains two GPIO controllers; a main controller and an "AON"
83 - nvidia,tegra186-gpio-aon
85 - nvidia,tegra194-gpio-aon
87 - nvidia,tegra234-gpio-aon
166 - nvidia,tegra186-gpio-aon
167 - nvidia,tegra194-gpio-aon
168 - nvidia,tegra234-gpio-aon
205 compatible = "nvidia,tegra186-gpio-aon";
/Linux-v6.1/drivers/clk/bcm/
Dclk-iproc-pll.c187 val = readl(pll->control_base + ctrl->aon.offset); in __pll_disable()
188 val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift; in __pll_disable()
189 iproc_pll_write(pll, pll->control_base, ctrl->aon.offset, val); in __pll_disable()
194 val = readl(pll->pwr_base + ctrl->aon.offset); in __pll_disable()
195 val |= 1 << ctrl->aon.iso_shift; in __pll_disable()
196 iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val); in __pll_disable()
199 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_disable()
200 iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val); in __pll_disable()
210 val = readl(pll->control_base + ctrl->aon.offset); in __pll_enable()
211 val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift); in __pll_enable()
[all …]
Dclk-bcm281xx.c31 /* AON CCU */
61 BCM281XX_CCU_COMMON(aon, AON),
64 KONA_CLK(aon, hub_timer, peri),
66 KONA_CLK(aon, pmu_bsc, peri),
68 KONA_CLK(aon, pmu_bsc_var, peri),
Dclk-sr.c37 .aon = AON_VAL(0x0, 5, 1, 0),
97 .aon = AON_VAL(0x0, 1, 13, 12),
156 .aon = AON_VAL(0x0, 1, 19, 18),
191 .aon = AON_VAL(0x0, 1, 25, 24),
245 .aon = AON_VAL(0x0, 1, 1, 0),
283 .aon = AON_VAL(0x0, 2, 19, 18),
328 .aon = AON_VAL(0x0, 2, 22, 21),
367 .aon = AON_VAL(0x0, 2, 25, 24),
Dclk-bcm21664.c30 /* AON CCU */
43 BCM21664_CCU_COMMON(aon, AON),
50 KONA_CLK(aon, hub_timer, peri),
Dclk-ns2.c33 .aon = AON_VAL(0x0, 1, 15, 12),
96 .aon = AON_VAL(0x0, 1, 11, 10),
158 .aon = AON_VAL(0x0, 2, 1, 0),
220 .aon = AON_VAL(0x0, 2, 5, 4),
/Linux-v6.1/Documentation/devicetree/bindings/timestamp/
Dnvidia,tegra194-hte.yaml19 GPIO lines from the AON (always on) GPIO controller.
24 - nvidia,tegra194-gte-aon
70 compatible = "nvidia,tegra194-gte-aon";
/Linux-v6.1/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt128 = Always-On control block (AON CTRL)
134 - compatible : should contain "brcm,brcmstb-aon-ctrl"
135 - reg : the register start and length for the AON CTRL block
139 aon-ctrl@410000 {
140 compatible = "brcm,brcmstb-aon-ctrl";
/Linux-v6.1/include/dt-bindings/clock/
Dbcm21664.h17 #define BCM21664_DT_AON_CCU_COMPAT "brcm,bcm21664-aon-ccu"
26 /* aon CCU clock ids */
Dbcm281xx.h22 #define BCM281XX_DT_AON_CCU_COMPAT "brcm,bcm11351-aon-ccu"
32 /* aon CCU clock ids */
/Linux-v6.1/Documentation/devicetree/bindings/arm/omap/
Dprcm.txt22 "ti,omap5-cm-core-aon"
26 "ti,dra7-cm-core-aon"
/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml32 - const: aon
147 clock-names = "core", "aon";
190 clock-names = "core", "aon";
/Linux-v6.1/Documentation/driver-api/hte/
Dtegra194-hte.rst19 needs to be configured as input. The always on (AON) GPIO controller instance
21 and AON GPIO controller are tightly coupled as it requires very specific bits
/Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra234-cbb.yaml17 which include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and
45 - nvidia,tegra234-aon-fabric
Dnvidia,tegra194-cbb.yaml20 "AON-NOC, SCE-NOC, RCE-NOC, BPMP-NOC, CV-NOC" and "CBB Central NOC"
49 - nvidia,tegra194-aon-noc
/Linux-v6.1/arch/arm/boot/dts/
Dbcm7445.dtsi145 aon-ctrl@410000 {
146 compatible = "brcm,brcmstb-aon-ctrl";
148 reg-names = "aon-ctrl", "aon-sram";
/Linux-v6.1/drivers/soc/bcm/brcmstb/pm/
Dpm-arm.c6 * S3: power off all of the chip except the Always ON (AON) island; keep DDR is
9 * treat this mode like a soft power-off, with wakeup allowed from AON
536 { .compatible = "brcm,brcmstb-aon-ctrl" },
667 * The AON is a small domain in the SoC that can retain its state across
669 * AON DATA RAM is a small RAM of a few words (< 1KB) which can store
701 /* AON ctrl registers */ in brcmstb_pm_probe()
710 /* AON SRAM registers */ in brcmstb_pm_probe()
/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dqcom,sdm845-adsp-pil.yaml46 - description: LPASS AHBS AON clock
47 - description: LPASS AHBM AON clock

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