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/Linux-v5.15/Documentation/devicetree/bindings/nds32/
Dcpus.txt1 * Andestech Processor Binding
4 representation of a Andestech Processor Core, which is the root node in the
12 Definition: Should be "andestech,<core_name>", "andestech,nds32v3" as fallback.
13 Must contain "andestech,nds32v3" as the most generic value, in addition to
15 "andestech,n13"
16 "andestech,n15"
17 "andestech,d15"
18 "andestech,n10"
19 "andestech,d10"
33 compatible = "andestech,n13", "andestech,nds32v3";
Dandestech-boards1 Andestech(nds32) AE3XX Platform
4 is composed of one Andestech(nds32) processor and AE3XX.
7 - compatible = "andestech,ae3xx";
12 compatible = "andestech,ae3xx";
18 Andestech(nds32) AG101P Platform
20 AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
31 compatible = "andestech,ag101p";
36 compatible = "andestech,ag101p";
Datl2c.txt1 * Andestech L2 cache Controller
10 representation of an Andestech L2 cache controller.
16 Definition: "andestech,atl2c"
24 compatible = "andestech,atl2c";
/Linux-v5.15/arch/nds32/boot/dts/
Dae3xx.dts3 compatible = "andestech,ae3xx";
22 compatible = "andestech,n13", "andestech,nds32v3";
30 compatible = "andestech,ativic32";
48 compatible = "andestech,uart16550", "ns16550a";
58 compatible = "andestech,atcpit100";
73 compatible = "andestech,atl2c";
80 compatible = "andestech,atmac100";
87 compatible = "andestech,nds32v3-pmu";
/Linux-v5.15/Documentation/devicetree/bindings/timer/
Dandestech,atcpit100-timer.txt1 Andestech ATCPIT100 timer
4 Andestech AE3XX platforms and other designs.
19 - compatible : Should be "andestech,atcpit100"
22 - clocks : a clock to provide the tick rate for "andestech,atcpit100"
28 compatible = "andestech,atcpit100";
/Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/
Dandestech,ativic32.txt1 * Andestech Internal Vector Interrupt Controller
10 - compatible : should at least contain "andestech,ativic32".
16 compatible = "andestech,ativic32";
/Linux-v5.15/Documentation/devicetree/bindings/perf/
Dnds32v3-pmu.txt9 "andestech,nds32v3-pmu"
15 compatible = "andestech,nds32v3-pmu";
/Linux-v5.15/drivers/clocksource/
Dtimer-atcpit100.c4 * Andestech ATCPIT100 Timer Device Driver Implementation
5 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
266 TIMER_OF_DECLARE(atcpit100, "andestech,atcpit100", atcpit100_timer_init);
DKconfig623 This option enables support for the Andestech ATCPIT100 timers.
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dfaraday,ftmac.txt7 "andestech,atmac100"
/Linux-v5.15/Documentation/devicetree/bindings/serial/
D8250.yaml80 - andestech,uart16550
231 compatible = "andestech,uart16550", "ns16550a";
/Linux-v5.15/arch/nds32/kernel/
Datl2c.c12 {.compatible = "andestech,atl2c",},
Dperf_event_cpu.c1123 {.compatible = "andestech,nds32v3-pmu",
/Linux-v5.15/drivers/irqchip/
Dirq-ativic32.c138 IRQCHIP_DECLARE(ativic32, "andestech,ativic32", ativic32_init_irq);
/Linux-v5.15/Documentation/translations/zh_CN/riscv/
Dpmu.rst15 Alan Kao <alankao@andestech.com>, Mar 2018
/Linux-v5.15/arch/riscv/kernel/
Dmodule-sections.c5 * Copyright (C) 2018 Andes Technology Corporation <zong@andestech.com>
/Linux-v5.15/Documentation/riscv/
Dpmu.rst5 Alan Kao <alankao@andestech.com>, Mar 2018
/Linux-v5.15/drivers/net/ethernet/faraday/
Dftmac100.c1164 { .compatible = "andestech,atmac100" },
/Linux-v5.15/Documentation/devicetree/bindings/
Dvendor-prefixes.yaml102 "^andestech,.*":
/Linux-v5.15/
DMAINTAINERS1197 M: Nick Hu <nickhu@andestech.com>
1202 F: Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt