| /Linux-v6.6/Documentation/devicetree/bindings/regulator/ |
| D | anatop-regulator.yaml | 4 $id: http://devicetree.org/schemas/regulator/anatop-regulator.yaml#
7 title: Freescale Anatop Voltage Regulators
17 const: fsl,anatop-regulator
21 anatop-reg-offset:
23 description: u32 value representing the anatop MFD register offset.
25 anatop-vol-bit-shift:
29 anatop-vol-bit-width:
33 anatop-min-bit-val:
37 anatop-min-voltage:
41 anatop-max-voltage:
[all …]
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| /Linux-v6.6/Documentation/devicetree/bindings/clock/ |
| D | fsl,imx8m-anatop.yaml | 4 $id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#
7 title: NXP i.MX8M Family Anatop Module
13 NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.
19 - fsl,imx8mm-anatop
20 - fsl,imx8mq-anatop
23 - fsl,imx8mn-anatop
24 - fsl,imx8mp-anatop
25 - const: fsl,imx8mm-anatop
45 anatop: clock-controller@30360000 {
46 compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
|
| /Linux-v6.6/arch/arm/mach-imx/ |
| D | anatop.c | 35 static struct regmap *anatop; variable
41 regmap_read(anatop, ANADIG_ANA_MISC0, &val); in imx_anatop_enable_weak2p5()
47 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG); in imx_anatop_enable_weak2p5()
52 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_fet_odrive()
58 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_2p5_pulldown()
64 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), in imx_anatop_disconnect_high_snvs()
103 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); in imx_init_revision_from_anatop()
106 if (of_device_is_compatible(np, "fsl,imx6sl-anatop")) in imx_init_revision_from_anatop()
108 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) in imx_init_revision_from_anatop()
117 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) { in imx_init_revision_from_anatop()
[all …]
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| D | Makefile | 32 obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
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| D | hardware.h | 82 * ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000
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| D | mach-imx6q.c | 114 * If enet_ref from ANATOP/CCM is the PTP clock source, we need to in imx6q_1588_init()
|
| /Linux-v6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx6sl.dtsi | 522 anatop: anatop@20c8000 { label
523 compatible = "fsl,imx6sl-anatop",
524 "fsl,imx6q-anatop",
532 compatible = "fsl,anatop-regulator";
537 anatop-reg-offset = <0x110>;
538 anatop-vol-bit-shift = <8>;
539 anatop-vol-bit-width = <5>;
540 anatop-min-bit-val = <4>;
541 anatop-min-voltage = <800000>;
542 anatop-max-voltage = <1375000>;
[all …]
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| D | imx6qdl.dtsi | 690 anatop: anatop@20c8000 { label
691 compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
698 compatible = "fsl,anatop-regulator";
703 anatop-reg-offset = <0x110>;
704 anatop-vol-bit-shift = <8>;
705 anatop-vol-bit-width = <5>;
706 anatop-min-bit-val = <4>;
707 anatop-min-voltage = <800000>;
708 anatop-max-voltage = <1375000>;
709 anatop-enable-bit = <0>;
[all …]
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| D | imx6sx.dtsi | 615 anatop: anatop@20c8000 { label
616 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
624 compatible = "fsl,anatop-regulator";
629 anatop-reg-offset = <0x110>;
630 anatop-vol-bit-shift = <8>;
631 anatop-vol-bit-width = <5>;
632 anatop-min-bit-val = <4>;
633 anatop-min-voltage = <800000>;
634 anatop-max-voltage = <1375000>;
635 anatop-enable-bit = <0>;
[all …]
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| D | imx6ul.dtsi | 577 anatop: anatop@20c8000 { label
578 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
586 compatible = "fsl,anatop-regulator";
590 anatop-reg-offset = <0x120>;
591 anatop-vol-bit-shift = <8>;
592 anatop-vol-bit-width = <5>;
593 anatop-min-bit-val = <0>;
594 anatop-min-voltage = <2625000>;
595 anatop-max-voltage = <3400000>;
596 anatop-enable-bit = <0>;
[all …]
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| D | imx6sll.dtsi | 502 anatop: anatop@20c8000 { label
503 compatible = "fsl,imx6sll-anatop",
504 "fsl,imx6q-anatop",
514 compatible = "fsl,anatop-regulator";
519 anatop-reg-offset = <0x120>;
520 anatop-vol-bit-shift = <8>;
521 anatop-vol-bit-width = <5>;
522 anatop-min-bit-val = <0>;
523 anatop-min-voltage = <2625000>;
524 anatop-max-voltage = <3400000>;
[all …]
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| D | imx7s.dtsi | 565 anatop: anatop@30360000 { label
566 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
573 compatible = "fsl,anatop-regulator";
577 anatop-reg-offset = <0x210>;
578 anatop-vol-bit-shift = <8>;
579 anatop-vol-bit-width = <5>;
580 anatop-min-bit-val = <8>;
581 anatop-min-voltage = <800000>;
582 anatop-max-voltage = <1200000>;
583 anatop-enable-bit = <0>;
[all …]
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| D | imxrt1050.dtsi | 46 anatop: anatop@400d8000 { label
47 compatible = "fsl,imxrt-anatop";
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| /Linux-v6.6/drivers/regulator/ |
| D | anatop-regulator.c | 203 ret = of_property_read_u32(np, "anatop-reg-offset", &control_reg); in anatop_regulator_probe()
205 dev_err(dev, "no anatop-reg-offset property set\n"); in anatop_regulator_probe()
208 ret = of_property_read_u32(np, "anatop-vol-bit-width", &vol_bit_width); in anatop_regulator_probe()
210 dev_err(dev, "no anatop-vol-bit-width property set\n"); in anatop_regulator_probe()
213 ret = of_property_read_u32(np, "anatop-vol-bit-shift", &vol_bit_shift); in anatop_regulator_probe()
215 dev_err(dev, "no anatop-vol-bit-shift property set\n"); in anatop_regulator_probe()
218 ret = of_property_read_u32(np, "anatop-min-bit-val", &min_bit_val); in anatop_regulator_probe()
220 dev_err(dev, "no anatop-min-bit-val property set\n"); in anatop_regulator_probe()
223 ret = of_property_read_u32(np, "anatop-min-voltage", &min_voltage); in anatop_regulator_probe()
225 dev_err(dev, "no anatop-min-voltage property set\n"); in anatop_regulator_probe()
[all …]
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| D | Makefile | 23 obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o
|
| /Linux-v6.6/Documentation/devicetree/bindings/phy/ |
| D | fsl,mxs-usbphy.yaml | 53 fsl,anatop:
55 phandle for anatop register, it is only for imx6 SoC series.
111 - fsl,anatop
125 fsl,anatop = <&anatop>;
|
| /Linux-v6.6/Documentation/devicetree/bindings/thermal/ |
| D | imx-thermal.yaml | 50 description: Phandle to anatop system controller node.
93 anatop@20c8000 {
94 compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
103 fsl,tempmon = <&anatop>;
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| /Linux-v6.6/drivers/usb/phy/ |
| D | phy-mxs-usb.c | 72 /* Anatop Registers */
404 /* If the SoCs don't have anatop, quit */ in mxs_phy_disconnect_line()
463 /* If the SoCs don't have anatop, quit */ in mxs_phy_is_low_speed_connection()
731 /* Some SoCs don't have anatop registers */ in mxs_phy_probe()
732 if (of_property_present(np, "fsl,anatop")) { in mxs_phy_probe()
734 (np, "fsl,anatop"); in mxs_phy_probe()
737 "failed to find regmap for anatop\n"); in mxs_phy_probe()
812 /* If the SoCs don't have anatop, quit */ in mxs_phy_enable_ldo_in_suspend()
|
| /Linux-v6.6/arch/arm/boot/dts/nxp/vf/ |
| D | vfxxx.dtsi | 373 anatop: anatop@40050000 { label
374 compatible = "fsl,vf610-anatop", "syscon";
383 fsl,anatop = <&anatop>;
392 fsl,anatop = <&anatop>;
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| /Linux-v6.6/drivers/clk/imx/ |
| D | clk-imxrt1050.c | 55 anp = of_find_compatible_node(NULL, NULL, "fsl,imxrt-anatop"); in imxrt1050_clocks_probe()
63 /* Anatop clocks */ in imxrt1050_clocks_probe()
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| D | clk-imx93.c | 292 np = of_find_compatible_node(NULL, NULL, "fsl,imx93-anatop"); in imx93_clocks_probe()
|
| /Linux-v6.6/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.yaml | 250 fsl,anatop:
251 description: phandle for the anatop node.
|
| /Linux-v6.6/drivers/soc/imx/ |
| D | soc-imx8m.c | 137 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); in imx8mm_soc_revision()
|
| /Linux-v6.6/arch/arm64/boot/dts/freescale/ |
| D | imx93.dtsi | 381 anatop: anatop@44480000 { label
382 compatible = "fsl,imx93-anatop", "syscon";
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| D | imx8mn.dtsi | 604 anatop: clock-controller@30360000 { label
605 compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
|
