Searched +full:am654 +full:- +full:tx +full:- +full:pru (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: TI Programmable Realtime Unit (PRU) cores10 - Suman Anna <s-anna@ti.com>13 Each Programmable Real-Time Unit and Industrial Communication Subsystem14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU17 use the Data RAMs present within the PRU-ICSS for code execution.[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy-am654-serdes.h>11 compatible = "mmio-sram";13 #address-cells = <1>;14 #size-cells = <1>;17 atf-sram@0 {21 sysfw-sram@f0000 {25 l3cache-sram@100000 {30 gic500: interrupt-controller@1800000 {[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/phy/phy-cadence.h>9 #include <dt-bindings/phy/phy-ti.h>12 serdes_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;21 compatible = "mmio-sram";23 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy.h>8 #include <dt-bindings/phy/phy-ti.h>9 #include <dt-bindings/mux/mux.h>10 #include <dt-bindings/mux/ti-serdes.h>13 cmn_refclk: clock-cmnrefclk {14 #clock-cells = <0>;15 compatible = "fixed-clock";16 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * PRU-ICSS remoteproc driver for various TI SoCs5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/8 * Suman Anna <s-anna@ti.com>37 /* CTRL register bit-fields */49 /* PRU/RTU/Tx_PRU Core IRAM address masks */58 /* PRU device addresses for various type of PRU RAMs */67 * enum pru_iomem - PRU core memory/register range identifiers69 * @PRU_IOMEM_IRAM: PRU Instruction RAM range70 * @PRU_IOMEM_CTRL: PRU Control register range[all …]
