Searched +full:am654 +full:- +full:secure +full:- +full:proxy (Results 1 – 10 of 10) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/mailbox/ |
D | ti,secure-proxy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments' Secure Proxy 10 - Nishanth Menon <nm@ti.com> 13 The Texas Instruments' secure proxy is a mailbox controller that has 16 called "threads" or "proxies" - each instance is unidirectional and is 22 pattern: "^mailbox@[0-9a-f]+$" 25 const: ti,am654-secure-proxy [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 10 #include <dt-bindings/mux/ti-serdes.h> 13 cmn_refclk: clock-cmnrefclk { 14 #clock-cells = <0>; 15 compatible = "fixed-clock"; 16 clock-frequency = <0>; [all …]
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/Linux-v6.1/drivers/mailbox/ |
D | ti-msgmgr.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/ 22 #include <linux/soc/ti/ti-msgmgr.h> 24 #define Q_DATA_OFFSET(proxy, queue, reg) \ argument 25 ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4)) 41 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor 43 * @proxy_id: Proxy ID representing the processor in SoC 53 * struct ti_msgmgr_desc - Description of message manager integration 57 * @data_first_reg: First data register for proxy data region 58 * @data_last_reg: Last data register for proxy data region [all …]
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