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/Linux-v6.1/arch/x86/include/asm/
Dsmap.h14 #include <asm/alternative.h>
23 ALTERNATIVE "", __ASM_CLAC, X86_FEATURE_SMAP
26 ALTERNATIVE "", __ASM_STAC, X86_FEATURE_SMAP
32 /* Note: a barrier is implicit in alternative() */ in clac()
33 alternative("", __ASM_CLAC, X86_FEATURE_SMAP); in clac()
38 /* Note: a barrier is implicit in alternative() */ in stac()
39 alternative("", __ASM_STAC, X86_FEATURE_SMAP); in stac()
47 ALTERNATIVE("", "pushf; pop %0; " __ASM_CLAC "\n\t", in smap_save()
57 ALTERNATIVE("", "push %0; popf\n\t", in smap_restore()
64 ALTERNATIVE("", __ASM_CLAC, X86_FEATURE_SMAP)
[all …]
Dalternative.h17 * Alternative inline assembly for SMP.
27 * The SMP alternative tables can be kept after boot and contain both
71 * Debug flag that can be tested to see whether alternative
129 * Pad the second replacement alternative with additional NOPs if it is
130 * additionally longer than the first replacement alternative.
161 /* alternative assembly primitive: */
162 #define ALTERNATIVE(oldinstr, newinstr, feature) \ macro
201 * Alternative instructions for different CPU types or capabilities.
212 #define alternative(oldinstr, newinstr, feature) \ macro
213 asm_inline volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
[all …]
Dbarrier.h5 #include <asm/alternative.h>
15 #define mb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "mfence", \
17 #define rmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "lfence", \
19 #define wmb() asm volatile(ALTERNATIVE("lock; addl $0,-4(%%esp)", "sfence", \
52 #define barrier_nospec() alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC)
/Linux-v6.1/tools/testing/selftests/net/
Daltnames.sh21 check_err $? "Failed to add short alternative name"
24 check_err $? "Failed to do link show with short alternative name"
27 check_err $? "Failed to get short alternative name from link show JSON"
30 check_err $? "Got unexpected short alternative name from link show JSON"
36 check_err $? "Failed to add long alternative name"
39 check_err $? "Failed to do link show with long alternative name"
42 check_err $? "Failed to get long alternative name from link show JSON"
45 check_err $? "Got unexpected long alternative name from link show JSON"
48 check_err $? "Failed to delete short alternative name"
51 check_fail $? "Unexpected success while trying to do link show with deleted short alternative name"
/Linux-v6.1/arch/parisc/include/asm/
Dcache.h9 #include <asm/alternative.h>
43 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
46 ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \
47 ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \
51 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
52 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \
55 ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \
56 ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")
Dalternative.h35 /* Alternative SMP implementation. */
36 #define ALTERNATIVE(cond, replacement) "!0:" \ macro
46 #define ALTERNATIVE(from, to, cond, replacement)\ macro
/Linux-v6.1/arch/s390/include/asm/
Dalternative.h30 * | alternative instr 1 |
33 * | alternative instr 2 |
39 * | alternative instr |
62 /* alternative assembly primitive: */
63 #define ALTERNATIVE(oldinstr, altinstr, facility) \ macro
84 * Alternative instructions for different CPU types or capabilities.
95 #define alternative(oldinstr, altinstr, facility) \ macro
96 asm_inline volatile(ALTERNATIVE(oldinstr, altinstr, facility) : : : "memory")
102 /* Alternative inline assembly with input. */
104 asm_inline volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
[all …]
Dalternative-asm.h23 * Define an alternative between two instructions. If @feature is
27 .macro ALTERNATIVE oldinstr, newinstr, feature
38 * Define an alternative between two instructions. If @feature is
/Linux-v6.1/arch/arm64/include/asm/
Dalternative-macros.h41 * alternative assembly primitive:
117 * Alternative sequences
131 * alternative sequence it is defined in (branches into an
132 * alternative sequence are not fixed up).
136 * Begin an alternative code sequence.
165 * Provide the other half of the alternative code sequence.
178 * Complete an alternative code sequence.
190 * Callback-based alternative epilogue
197 * Provides a trivial alternative or default sequence consisting solely
213 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
[all …]
Dirqflags.h8 #include <asm/alternative.h>
35 asm volatile(ALTERNATIVE( in arch_local_irq_enable()
54 asm volatile(ALTERNATIVE( in arch_local_irq_disable()
70 asm volatile(ALTERNATIVE( in arch_local_save_flags()
85 asm volatile(ALTERNATIVE( in arch_irqs_disabled_flags()
122 asm volatile(ALTERNATIVE( in arch_local_irq_restore()
Dlse.h15 #include <asm/alternative.h>
16 #include <asm/alternative-macros.h>
34 ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)
Dio.h18 #include <asm/alternative.h>
52 asm volatile(ALTERNATIVE("ldrb %w0, [%1]", in __raw_readb()
64 asm volatile(ALTERNATIVE("ldrh %w0, [%1]", in __raw_readw()
75 asm volatile(ALTERNATIVE("ldr %w0, [%1]", in __raw_readl()
86 asm volatile(ALTERNATIVE("ldr %0, [%1]", in __raw_readq()
Darch_timer.h69 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in arch_timer_read_cntpct_el0()
81 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in arch_timer_read_cntvct_el0()
189 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0", in __arch_counter_get_cntpct()
210 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0", in __arch_counter_get_cntvct()
Dkvm_hyp.h12 #include <asm/alternative.h>
22 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
32 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
/Linux-v6.1/tools/testing/selftests/powerpc/pmu/event_code_tests/
Devent_alternatives_tests_p9.c34 * alternative events is handled by respective PMU driver in event_alternatives_tests_p9()
50 * Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event in event_alternatives_tests_p9()
63 * Expected to pass since PM_INST_DISP in PMC2 has alternative event in event_alternatives_tests_p9()
76 * Expected to pass since PM_BR_2PATH in PMC2 has alternative event in event_alternatives_tests_p9()
89 * Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event in event_alternatives_tests_p9()
102 * Expected to pass since PM_RUN_INST_CMPL_ALT in PMC4 has alternative event in event_alternatives_tests_p9()
Devent_alternatives_tests_p10.c35 * alternative events is handled by respective PMU driver in event_alternatives_tests_p10()
44 * Test for event alternative for 0x0001e in event_alternatives_tests_p10()
65 * Expected to pass since 0x0001e has alternative event in event_alternatives_tests_p10()
93 * Expected to pass since 0x00020 has alternative event in event_alternatives_tests_p10()
/Linux-v6.1/arch/riscv/include/asm/
Dalternative-macros.h19 .pushsection .alternative, "a"
86 ".pushsection .alternative, \"a\"\n" \
175 * ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k)
177 * asm(ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k));
186 #define ALTERNATIVE(old_content, new_content, vendor_id, errata_id, CONFIG_k) \ macro
191 * ALTERNATIVE() to patch its customized content at the same location. In
193 * on the following sample code and then replace ALTERNATIVE() with
Derrata_list.h8 #include <asm/alternative.h>
30 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \
36 ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \
43 asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \
72 asm volatile(ALTERNATIVE( \
/Linux-v6.1/arch/x86/um/asm/
Dbarrier.h6 #include <asm/alternative.h>
15 #define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
16 #define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
17 #define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
/Linux-v6.1/arch/x86/entry/
Dcalling.h162 ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID
168 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
179 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
182 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
219 ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI
237 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
239 ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID
301 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
330 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS
358 ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER
[all …]
/Linux-v6.1/arch/s390/kernel/
Dalternative.c6 #include <asm/alternative.h>
28 * alternative code can overwrite previously scanned alternative code. in __apply_alternatives()
Dentry.S14 #include <asm/alternative-asm.h>
39 ALTERNATIVE "nop", ".insn s,0xb2010000,\address", 193
43 ALTERNATIVE "nop", ".insn s,0xb2000000,\address", 193
47 ALTERNATIVE "b \lpswe; nopr", ".insn siy,0xeb0000000071,\address,0", 193
51 ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK), 193
107 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", 82
111 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", 82
115 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \
121 ALTERNATIVE "jz .+8; .insn rrf,0xb2e80000,0,0,12,0", \
222 ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40
[all …]
/Linux-v6.1/arch/parisc/kernel/
Dpacache.S26 #include <asm/alternative.h>
106 ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP)
244 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP)
305 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
548 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
549 ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB)
677 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
743 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
775 89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP)
792 ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB)
[all …]
Dalternative.c3 * Alternative live-patching for parisc.
10 #include <asm/alternative.h>
83 pr_debug("ALTERNATIVE %3d: Cond %2x, Replace %2d instructions to 0x%08x @ 0x%px (%pS)\n", in apply_alternatives()
/Linux-v6.1/arch/riscv/kernel/
Dalternative.c3 * alternative runtime patching
13 #include <asm/alternative.h>
100 * for alternative.o in kernel/Makefile.

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