Searched full:allowable (Results 1 – 25 of 108) sorted by relevance
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89 * @lo: lowest allowable value90 * @hi: highest allowable value124 * @lo: minimum allowable value125 * @hi: maximum allowable value135 * @lo: minimum allowable value136 * @hi: maximum allowable value
21 * Maximum allowable number of contiguous slabs to map,
33 * @pllm_min: Minimum allowable value for PLLM[PLLM]34 * @pllm_max: Maximum allowable value for PLLM[PLLM]35 * @pllout_min_rate: Minimum allowable rate for PLLOUT36 * @pllout_max_rate: Maximum allowable rate for PLLOUT
18 This is an integer and represents allowable DMA bursts when fixed burst.19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.20 When fixed length is needed for burst mode, it can be set within allowable
37 Specifies the maximum power consumption allowable by a module in the
6 * may_use_simd - whether it is allowable at this time to issue SIMD
427 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum428 * allowable programmed frequency and does not account for clock432 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum433 * allowable programmed frequency and does not account for clock474 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum475 * allowable programmed frequency and does not account for clock479 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum480 * allowable programmed frequency and does not account for clock490 * This sets the desired frequency for a clock within an allowable
1442 * @min_freq: The minimum allowable frequency in Hz. This is the minimum1443 * allowable programmed frequency and does not account for clock1447 * @max_freq: The maximum allowable frequency in Hz. This is the maximum1448 * allowable programmed frequency and does not account for clock1520 * @min_freq: The minimum allowable frequency in Hz. This is the minimum1521 * allowable programmed frequency and does not account for clock1525 * @max_freq: The maximum allowable frequency in Hz. This is the maximum1526 * allowable programmed frequency and does not account for clock
20 * may_use_simd - whether it is allowable at this time to issue SIMD
15 Allowable values of 0x00 through 0x0F. These are raw values written to the
18 Allowable values of 0x00 through 0x0F. These are raw values written to the
64 int "maximum allowable number of ranges in efi_fake_mem boot option"69 Maximum allowable number of ranges in efi_fake_mem boot option.
158 * -min_freq: The minimum allowable frequency in Hz. This is the minimum159 * allowable programmed frequency and does not account for clock163 * -max_freq: The maximum allowable frequency in Hz. This is the maximum164 * allowable programmed frequency and does not account for clock
39 /* Powerdomain allowable state bitfields */
18 /* Max number of segments allowable in LUX table */
5 * linkmode_resolve_pause - resolve the allowable pause modes
61 * @max_core_clk_rate: maximum allowable core clock rate
78 of 1Hz to 128HZ which must be scaled to originate an allowable sample
55 * Max allowable width is limited on a per device basis
71 * insane value at boot (values outside of the allowable frequency in shoc_clk_init()
204 * use max allowable by PMSIDR_EL1.INTERVAL in arm_spe_pmu_default_config()
63 * @timeout: maximum allowable time in jiffies between start I/O and interrupt
63 #define NR_MAX_WINDOW_SIZE 127 /* Maximum Window Allowable - 127 */
1118 * In scaled mode the allowable input clock range is in adis16475_config_sync_mode()1119 * 1 Hz to 128 Hz, and the allowable output range is in adis16475_config_sync_mode()1121 * get the allowable output. in adis16475_config_sync_mode()
