Searched full:adjustable (Results 1 – 25 of 71) sorted by relevance
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49 This is adjustable via65 This is adjustable via84 This is adjustable via102 This is adjustable via118 This is adjustable via
7 * Adjustable divider clock implementation16 * DOC: basic adjustable divider clock that cannot gate21 * rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor)32 * struct zynqmp_clk_divider - adjustable divider clock
13 * DOC: basic adjustable multiplexer clock that cannot gate19 * parent - parent is adjustable through clk_set_parent
376 * @fixed_rate: non-adjustable clock rate389 * @fixed_rate: non-adjustable clock rate401 * @fixed_rate: non-adjustable clock rate414 * @fixed_rate: non-adjustable clock rate428 * @fixed_rate: non-adjustable clock rate429 * @fixed_accuracy: non-adjustable clock accuracy444 * @fixed_rate: non-adjustable clock rate445 * @fixed_accuracy: non-adjustable clock accuracy459 * @fixed_rate: non-adjustable clock rate460 * @fixed_accuracy: non-adjustable clock accuracy[all …]
5 * Adjustable factor-based clock implementation19 * DOC: basic adjustable factor-based clock24 * rate - rate is adjustable.
6 register-mapped adjustable clock rate divider that does not gate and has59 - reg : offset for register controlling adjustable divider
11 an adjustable clock rate divider, this behaves exactly as [3]
42 - reg : register offset for register controlling adjustable mux
248 If you have a LCD backlight adjustable by PWM, say Y to enable445 If you have a LCD backlight adjustable by GPIO, say Y to enable477 If you have a LCD backlight adjustable by LED class driver, say Y
15 this value is adjustable depending on platform.
392 #define MWIFIEX_MEF_MAX_BYTESEQ 6 /* non-adjustable */440 #define MWIFIEX_COALESCE_MAX_BYTESEQ 4 /* non-adjustable */
20 adjustable conversion time, and averaging function are also built in for
18 * DOC: basic adjustable multiplexer clock that cannot gate24 * parent - parent is adjustable through clk_set_parent
20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
16 * rate - rate is adjustable.22 * rate - rate is adjustable.28 * rate - rate is adjustable.
24 Each vcpu has an adjustable guest_halt_poll_ns
29 temperature sensors. Each PWM output is individually adjustable and
50 * struct imx_icc_node_adj - Describe a dynamic adjustable node
89 - FF_GAIN gain is adjustable90 - FF_AUTOCENTER autocenter is adjustable
200 __u32 dmode_extra; /* adjustable bus settings */201 __u32 dcntl_extra; /* adjustable bus settings */202 __u32 ctest7_extra; /* adjustable bus settings */
40 * struct sprd_pll - definition of adjustable pll clock
22 * Adjustable tx de-emphasis (FFE)
20 tuners does not have much adjustable features.
60 * struct clk_regmap_div_data - regmap backed adjustable divider specific data
