/Linux-v5.10/Documentation/filesystems/ |
D | qnx6.rst | 56 data and the addressing levels in that specific tree. 60 Level 1 adds an additional indirect addressing level where each indirect 61 addressing block holds up to blocksize / 4 bytes pointers to data blocks. 62 Level 2 adds an additional indirect addressing block level (so, already up 66 indirect addressing blocks or inodes. 97 For more than 16 blocks an indirect addressing in form of another tree is 143 Long filenames are stored in a separate addressing tree. The staring point 165 smaller than addressing space in the bitmap. 183 Bitmap blocks, Inode blocks and indirect addressing blocks for those two
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/Linux-v5.10/arch/m68k/math-emu/ |
D | fp_decode.h | 59 * addressing mode (e.g. pc relative modes as destination), as long 60 * as it only means a new addressing mode, which should not appear 112 | extract the addressing mode 128 | extract the register for the addressing mode 214 | addressing mode: data register direct 220 | addressing mode: address register indirect 244 | addressing mode: address register indirect with postincrement 263 | addressing mode: address register indirect with predecrement 289 | addressing mode: address register/programm counter indirect 331 | all other indirect addressing modes will finally end up here [all …]
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D | fp_scan.S | 133 | decode addressing mode for source 141 | addressing mode: data register direct 171 | addressing mode: address register indirect 176 | addressing mode: address register indirect with postincrement 181 | addressing mode: address register indirect with predecrement 186 | addressing mode: address register/programm counter indirect 192 | all other indirect addressing modes will finally end up here 197 | all pc relative addressing modes and immediate/absolute modes end up here 211 | addressing mode: absolute short 216 | addressing mode: absolute long [all …]
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D | fp_move.S | 64 | encode addressing mode for dest 72 | addressing mode: data register direct 135 | addressing mode: address register indirect 140 | addressing mode: address register indirect with postincrement 145 | addressing mode: address register indirect with predecrement 150 | addressing mode: address register indirect with 16bit displacement
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/Linux-v5.10/drivers/memory/ |
D | emif.c | 44 * @addressing table with addressing information from the spec 64 const struct lpddr2_addressing *addressing; member 301 /* Find addressing table entry based on the device's type and density */ 371 const struct lpddr2_addressing *addressing) in get_sdram_ref_ctrl_shdw() argument 377 t_refi = addressing->tREFI_ns / 100; in get_sdram_ref_ctrl_shdw() 391 const struct lpddr2_addressing *addressing) in get_sdram_tim_1_shdw() argument 398 if (addressing->num_banks == B8) in get_sdram_tim_1_shdw() 424 const struct lpddr2_addressing *addressing) in get_sdram_tim_1_shdw_derated() argument 435 if (addressing->num_banks == B8) { in get_sdram_tim_1_shdw_derated() 464 const struct lpddr2_addressing *addressing, in get_sdram_tim_2_shdw() argument [all …]
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/Linux-v5.10/Documentation/scsi/ |
D | aha152x.rst | 126 The BIOS uses a cylinder/head/sector addressing scheme (C/H/S) 128 C/H/S addressing. 131 as base for requests in C/H/S addressing. SCSI only knows about the 135 geometry just to be able to support that addressing scheme. The geometry 141 instead of C/H/S addressing. Unfortunately C/H/S addressing is also used 145 Moreover there are certain limitations to the C/H/S addressing scheme,
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/Linux-v5.10/drivers/mtd/spi-nor/ |
D | xilinx.c | 56 * Default addressing mode). It can be changed to a more standard in xilinx_nor_setup() 59 * and the page size cannot be changed back to default addressing in xilinx_nor_setup() 62 * The current addressing mode can be read from the XRDSR register in xilinx_nor_setup() 72 /* Flash in Default addressing mode */ in xilinx_nor_setup()
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/Linux-v5.10/Documentation/x86/x86_64/ |
D | fsgs.rst | 7 memory can use segment register based addressing mode. The following 38 applications. GCC and Clang support GS based addressing via address space 85 more flexible usage of the FS/GS addressing modes in user space 141 Compiler support for FS/GS based addressing 144 GCC version 6 and newer provide support for FS/GS based addressing via 189 FS/GS based addressing with inline assembly 193 be used for FS/GS based addressing mode::
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/Linux-v5.10/arch/m68k/include/asm/ |
D | mcfdma.h | 84 #define MCFDMA_DMR_DSTM 0x00002000L /* Destination addressing mask */ 85 #define MCFDMA_DMR_DSTM_SA 0x00000000L /* Destination uses static addressing */ 86 #define MCFDMA_DMR_DSTM_IA 0x00002000L /* Destination uses incremental addressing */ 96 #define MCFDMA_DMR_SRCM 0x00000020L /* Source addressing mask */ 97 #define MCFDMA_DMR_SRCM_SA 0x00000000L /* Source uses static addressing */ 98 #define MCFDMA_DMR_SRCM_IA 0x00000020L /* Source uses incremental addressing */
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/Linux-v5.10/Documentation/networking/ |
D | j1939.rst | 11 sophisticated addressing scheme and extends the maximum packet size above 8 32 addressing and transport methods used by J1939. 34 * **Addressing:** when a process on an ECU communicates via J1939, it should 42 * **Dynamic addressing:** Address Claiming in J1939 is time critical. 46 results in a consistent J1939 bus with proper addressing. 94 Addressing section in J1939 concepts 97 Both static and dynamic addressing methods can be used. 103 For dynamic addressing, so-called Address Claiming, extra support is foreseen 303 Dynamic Addressing 385 Static Addressing
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/Linux-v5.10/arch/arm/mach-ebsa110/ |
D | io.c | 207 * We're addressing an 8 or 16-bit peripheral which tranfers 215 * The SuperIO registers use sane addressing techniques... in __inb8() 234 * We're addressing a 16-bit peripheral which transfers odd 242 * The SuperIO registers use sane addressing techniques... in __inb16() 257 * The SuperIO registers use sane addressing techniques... in __inw() 291 * The SuperIO registers use sane addressing techniques... in __outb8() 313 * The SuperIO registers use sane addressing techniques... in __outb16() 328 * The SuperIO registers use sane addressing techniques... in __outw()
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/Linux-v5.10/arch/s390/kvm/ |
D | gaccess.h | 45 * applying the rules of the vcpu's addressing mode defined by PSW bits 31 46 * and 32 (extendended/basic addressing mode). 48 * Depending on the vcpu's addressing mode the upper 40 bits (24 bit addressing 49 * mode), 33 bits (31 bit addressing mode) or no bits (64 bit addressing mode) 186 * The addressing mode of the PSW is also inspected, so that address wrap 187 * around is taken into account for 24-, 31- and 64-bit addressing mode,
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/Linux-v5.10/drivers/scsi/sym53c8xx_2/ |
D | sym53c8xx.h | 32 * DMA addressing mode. 34 * 0 : 32 bit addressing for all chips. 35 * 1 : 40 bit addressing when supported by chip. 36 * 2 : 64 bit addressing when supported by chip,
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/Linux-v5.10/arch/sh/mm/ |
D | Kconfig | 70 # Physical addressing modes 81 bool "Support 32-bit physical addressing through PMB" 86 If you say Y here, physical addressing will be extended to 88 29-bit physical addressing will be used.
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/Linux-v5.10/drivers/media/dvb-frontends/drx39xyj/ |
D | drx_dap_fasi.h | 37 * Fast access, because of short addressing format (16 instead of 32 bits addr) 64 * Comments about short/long addressing format: 98 #error At least one of short- or long-addressing format must be allowed. 135 * in combination with short and long addressing format. All text below 136 * assumes long addressing format. The table also includes information 137 * for short ADDRessing format.
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/Linux-v5.10/drivers/staging/fbtft/ |
D | fb_ssd1305.c | 72 /* Set Memory Addressing Mode */ in init_display() 74 /* Vertical addressing mode */ in init_display() 124 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win() 126 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
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D | fb_ssd1306.c | 73 /* Set Memory Addressing Mode */ in init_display() 75 /* Vertical addressing mode */ in init_display() 138 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win() 140 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
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/Linux-v5.10/include/uapi/linux/can/ |
D | isotp.h | 78 __u8 ext_address; /* set address for extended addressing */ 87 __u8 rx_ext_address; /* set address for extended addressing */ 128 #define CAN_ISOTP_EXTEND_ADDR 0x002 /* enable extended addressing */ 136 #define CAN_ISOTP_RX_EXT_ADDR 0x200 /* different rx extended addressing */
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/Linux-v5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
D | dma.h | 29 * support two DMA engines: 32 bits address or 64 bit addressing 34 /* 32 bits addressing */ 43 /* 64 bits addressing */
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/Linux-v5.10/include/drm/ |
D | drm_vma_manager.h | 155 * drm_vma_node_start() - Return start address for page-based addressing 160 * this can only be used for page-based addressing. If you need a proper offset 165 * Start address of @node for page-based addressing. 0 if the node does not 199 * Offset of @node for byte-based addressing. 0 if the node does not have an
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/Linux-v5.10/Documentation/devicetree/bindings/mtd/ |
D | jedec,spi-nor.txt | 72 - broken-flash-reset : Some flash devices utilize stateful addressing modes 73 (e.g., for 32-bit addressing) which need to be managed
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/Linux-v5.10/Documentation/hwmon/ |
D | abituguru-datasheet.rst | 56 Addressing section in Reading / Writing 59 The uGuru has a number of different addressing levels. The first addressing 71 terminology for the addressing within a bank this is not 100% correct, in 72 bank 0x24 for example the addressing within the bank selects a PWM output not
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/Linux-v5.10/lib/ |
D | sort.c | 50 * Exchange the two objects in memory. This exploits base+index addressing, 74 * addressing, which basically all CPUs have, to minimize loop overhead 78 * one requires base+index+4 addressing which x86 has but most other 91 /* Use two 32-bit transfers to avoid base+index+4 addressing */ in swap_words_64()
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/Linux-v5.10/Documentation/driver-api/mtd/ |
D | spi-nor.rst | 17 which the controller driver is aware of the opcodes, addressing, and other 65 flash chip such as addressing mode. Call it whenever detach the driver from
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/Linux-v5.10/arch/arm/include/asm/ |
D | domain.h | 27 * addressing. In such cases, we want to map system memory with 30 * 36-bit addressing and supersections are only available on
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