Searched full:usbphyc (Results 1 – 16 of 16) sorted by relevance
137 struct stm32_usbphyc *usbphyc; member168 static int stm32_usbphyc_regulators_enable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_enable() argument172 ret = regulator_enable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()176 ret = regulator_enable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_enable()183 regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()188 static int stm32_usbphyc_regulators_disable(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_regulators_disable() argument192 ret = regulator_disable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_disable()196 ret = regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_disable()230 static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc) in stm32_usbphyc_pll_init() argument233 u32 clk_rate = clk_get_rate(usbphyc->clk); in stm32_usbphyc_pll_init()[all …]
6 obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o
46 (USBPHYC) and the two 8-bit wide UTMI+ interfaces. First interface is
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI16 USBPHYC31 const: st,stm32mp1-usbphyc239 usbphyc: usbphyc@5a006000 {240 compatible = "st,stm32mp1-usbphyc";
96 &usbphyc {
141 &usbphyc {
159 &usbphyc {
219 &usbphyc {
1510 clocks = <&usbphyc>, <&rcc USBH>;1519 clocks = <&usbphyc>, <&rcc USBH>;1550 usbphyc: usbphyc@5a006000 { label1554 compatible = "st,stm32mp1-usbphyc";
319 &usbphyc {
331 &usbphyc {
308 &usbphyc {
383 &usbphyc {
483 &usbphyc {
528 &usbphyc {
703 &usbphyc {
