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/Linux-v5.10/drivers/media/pci/ivtv/
Divtv-udma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
6 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
7 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
11 #include "ivtv-driver.h"
12 #include "ivtv-udma.h"
16 dma_page->uaddr = first & PAGE_MASK; in ivtv_udma_get_page_info()
17 dma_page->offset = first & ~PAGE_MASK; in ivtv_udma_get_page_info()
18 dma_page->tail = 1 + ((first+size-1) & ~PAGE_MASK); in ivtv_udma_get_page_info()
19 dma_page->first = (first & PAGE_MASK) >> PAGE_SHIFT; in ivtv_udma_get_page_info()
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Divtv-udma.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2006-2007 Hans Verkuil <hverkuil@xs4all.nl>
26 pci_dma_sync_single_for_device(itv->pdev, itv->udma.SG_handle, in ivtv_udma_sync_for_device()
27 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_sync_for_device()
32 pci_dma_sync_single_for_cpu(itv->pdev, itv->udma.SG_handle, in ivtv_udma_sync_for_cpu()
33 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_sync_for_cpu()
/Linux-v5.10/drivers/ata/
Dpata_amd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_amd.c - AMD PATA for new ATA layer
4 * (C) 2005-2006 Red Hat Inc
6 * Based on pata-sil680. Errata information is taken from data sheets
7 * and the amd74xx.c driver by Vojtech Pavlik. Nvidia SATA devices are
8 * claimed by sata-nv.c.
30 * timing_setup - shared timing computation and load
49 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in timing_setup()
51 int dn = ap->port_no * 2 + adev->devno; in timing_setup()
63 dev_err(&pdev->dev, "unknown mode %d\n", speed); in timing_setup()
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Dpata_serverworks.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_serverworks.c - Serverworks PATA for new ATA layer
4 * (C) 2005 Red Hat Inc
5 * (C) 2010 Bartlomiej Zolnierkiewicz
9 * serverworks.c
11 * Copyright (C) 1998-2000 Michel Aubry
12 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
13 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
14 * Portions copyright (c) 2001 Sun Microsystems
20 * supports UDMA mode 2 (33 MB/s)
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Dpata_it821x.c2 * pata_it821x.c - IT821x PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
5 * (C) 2007 Bartlomiej Zolnierkiewicz
9 * it821x.c
11 * linux/drivers/ide/pci/it821x.c Version 0.09 December 2004
13 * Copyright (C) 2004 Red Hat
41 * - In pass through mode we do all the work you would expect
42 * - In smart mode the clocking set up is done by the controller generally
44 * - There are a few extra vendor commands that actually talk to the
55 * is a raid volume. Even more cute - the controller can do automated
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Dpata_artop.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_artop.c - ARTOP ATA controller driver
5 * (C) 2006 Red Hat
6 * (C) 2007,2011 Bartlomiej Zolnierkiewicz
8 * Based in part on drivers/ide/pci/aec62xx.c
9 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
11 * driver by Thibaut VARENE <varenet@parisc-linux.org>
43 * artop62x0_pre_reset - probe begin
57 struct ata_port *ap = link->ap; in artop62x0_pre_reset()
58 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in artop62x0_pre_reset()
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Dpata_via.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_via.c - VIA PATA for new ATA layer
4 * (C) 2005-2006 Red Hat Inc
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
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Dpata_ali.c2 * pata_ali.c - ALI 15x3 PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
6 * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
8 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
9 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
10 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
12 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
14 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
54 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
55 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
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Dpata_atiixp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_atiixp.c - ATI PATA for new ATA layer
4 * (C) 2005 Red Hat Inc
5 * (C) 2009-2010 Bartlomiej Zolnierkiewicz
9 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
11 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
12 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
39 /* Board has onboard PATA<->SATA converters */
40 .ident = "MSI E350DM-E33",
43 DMI_MATCH(DMI_BOARD_NAME, "E350DM-E33(MS-7720)"),
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Dpata_bk3710.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (c) 2017 Samsung Electronics Co., Ltd.
9 * Based on palm_bk3710.c:
11 * Copyright (C) 2006 Texas Instruments.
12 * Copyright (C) 2007 MontaVista Software, Inc., <source@mvista.com>
53 unsigned int rptime; /* tRP -- Ready to pause time (nsec) */
54 unsigned int cycletime; /* tCYCTYP2/2 -- avg Cycle Time (nsec) */
59 { 160, 240 / 2 }, /* UDMA Mode 0 */
60 { 125, 160 / 2 }, /* UDMA Mode 1 */
61 { 100, 120 / 2 }, /* UDMA Mode 2 */
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Dpata_pdc2027x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
9 * Portions Copyright (C) 1999 Promise Technology, Inc.
15 * as Documentation/driver-api/libata.rst
100 { 0x4a, 0x0f, 0xd5 }, /* UDMA mode 0 */
101 { 0x3a, 0x0a, 0xd0 }, /* UDMA mode 1 */
102 { 0x2a, 0x07, 0xcd }, /* UDMA mode 2 */
103 { 0x1a, 0x05, 0xcd }, /* UDMA mode 3 */
104 { 0x1a, 0x03, 0xcd }, /* UDMA mode 4 */
105 { 0x1a, 0x02, 0xcb }, /* UDMA mode 5 */
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Dpata_hpt3x3.c2 * pata_hpt3x3 - HPT3x3 driver
3 * (c) Copyright 2005-2006 Red Hat
9 * linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
10 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
28 * hpt3x3_set_piomode - PIO setup
33 * all we have to do is clear the MWDMA and UDMA bits then load the
39 struct pci_dev *pdev = to_pci_dev(ap->host->dev); in hpt3x3_set_piomode()
41 int dn = 2 * ap->port_no + adev->devno; in hpt3x3_set_piomode()
47 r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn); in hpt3x3_set_piomode()
48 r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */ in hpt3x3_set_piomode()
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Dpata_sis.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_sis.c - SiS ATA driver
5 * (C) 2005 Red Hat
6 * (C) 2007,2009 Bartlomiej Zolnierkiewicz
8 * Based upon linux/drivers/ide/pci/sis5513.c
9 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
10 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
11 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
19 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
67 while (lap->device) { in sis_short_ata40()
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Dpata_rdc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pata_rdc - Driver for later RDC PATA controllers
6 * INCITS 370-2004 (1510D): ATA Host Adapter Standards
30 * rdc_pata_cable_detect - Probe host controller cable detect info
33 * Read 80c cable indicator from ATA PCI device's PCI config
42 struct rdc_host_priv *hpriv = ap->host->private_data; in rdc_pata_cable_detect()
46 mask = 0x30 << (2 * ap->port_no); in rdc_pata_cable_detect()
47 if ((hpriv->saved_iocfg & mask) == 0) in rdc_pata_cable_detect()
53 * rdc_pata_prereset - prereset for PATA host controller
62 struct ata_port *ap = link->ap; in rdc_pata_prereset()
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Dpata_cs5530.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata-cs5530.c - CS5530 PATA for new ATA layer
4 * (C) 2005 Red Hat Inc
6 * based upon cs5530.c by Mark Lord.
28 unsigned long bmdma = (unsigned long)ap->ioaddr.bmdma_addr; in cs5530_port_base()
30 return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no); in cs5530_port_base()
34 * cs5530_set_piomode - PIO setup
57 if (adev->devno) in cs5530_set_piomode()
60 iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base); in cs5530_set_piomode()
64 * cs5530_set_dmamode - DMA timing setup
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/Linux-v5.10/Documentation/devicetree/bindings/dma/ti/
Dk3-udma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Ujfalusi <peter.ujfalusi@ti.com>
13 The UDMA-P is intended to perform similar (but significantly upgraded)
14 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
16 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
27 on the Rx PSI-L interface.
29 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
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/Linux-v5.10/drivers/ide/
Damd74xx.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2000-2002 Vojtech Pavlik
7 * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
39 return (dev->vendor == PCI_VENDOR_ID_NVIDIA) ? 0x10 : 0; in amd_offset()
52 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1)); in amd_set_speed()
55 pci_write_config_byte(dev, AMD_8BIT_TIMING + offset + (1 - (dn >> 1)), in amd_set_speed()
56 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1)); in amd_set_speed()
58 pci_write_config_byte(dev, AMD_DRIVE_TIMING + offset + (3 - dn), in amd_set_speed()
59 ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1)); in amd_set_speed()
62 case ATA_UDMA2: t = timing->udma ? (0xc0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break; in amd_set_speed()
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Dit821x.c2 * Copyright (C) 2004 Red Hat
3 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
30 * - In pass through mode we do all the work you would expect
31 * - In smart mode the clocking set up is done by the controller generally
33 * - There are a few extra vendor commands that actually talk to the
44 * is a raid volume. Even more cute - the controller can do automated
49 * non UDMA devices restrict each others performance. It also has a
57 * - ATAPI UDMA is ok but not MWDMA it seems
58 * - RAID configuration ioctls
59 * - Move to libata once it grows up
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Dvia82cxxx.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright (c) 2000-2002 Vojtech Pavlik
10 * Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
113 * via_set_speed - write timing registers
123 struct pci_dev *dev = to_pci_dev(hwif->dev); in via_set_speed()
125 struct via82cxxx_dev *vdev = host->host_priv; in via_set_speed()
128 if (~vdev->via_config->flags & VIA_BAD_AST) { in via_set_speed()
130 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1)); in via_set_speed()
134 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)), in via_set_speed()
135 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1)); in via_set_speed()
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Dcs5530.c2 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 2000 Mark Lord <mlord@pobox.com>
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
27 * Here are the standard PIO mode 0-4 timings for each "format".
28 * Format-0 uses fast data reg timings, with slower command reg timings.
29 * Format-1 uses fast timings for all registers, but won't work with all drives.
40 #define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
43 * cs5530_set_pio_mode - set host controller for PIO mode
57 const u8 pio = drive->pio_mode - XFER_PIO_0; in cs5530_set_pio_mode()
59 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3)); in cs5530_set_pio_mode()
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Dide-timings.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1999-2001 Vojtech Pavlik
4 * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
7 * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
16 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
17 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
61 for (t = ide_timing; t->mode != speed; t++) in ide_timing_find_mode()
62 if (t->mode == 0xff) in ide_timing_find_mode()
70 u16 *id = drive->id; in ide_pio_cycle_time()
75 if (ata_id_has_iordy(drive->id)) in ide_pio_cycle_time()
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Dpiix.c2 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
3 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
4 * Copyright (C) 2003 Red Hat
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
19 * PIIX4 errata #9 - Only on ultra obscure hw
20 * ICH3 errata #13 - Not observed to affect real hw
24 * PIIX4 errata #10 - BM IDE hang with non UDMA
26 * 440MX errata #15 - As PIIX4 errata #10
27 * PIIX4 errata #15 - Must not read control registers
29 * 440MX errata #13 - As PIIX4 errata #15
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Dalim15x3.c2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
8 * Copyright (C) 2002 Alan Cox
10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
11 * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
13 * (U)DMA capable version of ali 1533/1543(C), 1535(D)
16 * 9/7/99 --Parts from the above author are included and need to be
53 struct pci_dev *pdev = to_pci_dev(hwif->dev); in ali_fifo_control()
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Dserverworks.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1998-2000 Michel Aubry
4 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
7 * Portions copyright (c) 2001 Sun Microsystems
13 * supports UDMA mode 2 (33 MB/s)
16 * all revisions support UDMA mode 4 (66 MB/s)
17 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
20 * *** to detect 80-conductor cable presence. ***
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Dpdc202xx_new.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
7 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2005-2007 MontaVista Software, Inc.
9 * Portions Copyright (C) 1999 Promise Technology, Inc.
43 switch(pdev->device) { in max_dma_rate()
63 * get_indexed_reg - Get indexed register
71 outb(index, hwif->dma_base + 1); in get_indexed_reg()
72 value = inb(hwif->dma_base + 3); in get_indexed_reg()
79 * set_indexed_reg - Set indexed register
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