Home
last modified time | relevance | path

Searched full:uarts (Results 1 – 25 of 127) sorted by relevance

123456

/Linux-v5.15/Documentation/devicetree/bindings/serial/
Dmtk-uart.txt5 * "mediatek,mt2701-uart" for MT2701 compatible UARTS
6 * "mediatek,mt2712-uart" for MT2712 compatible UARTS
7 * "mediatek,mt6580-uart" for MT6580 compatible UARTS
8 * "mediatek,mt6582-uart" for MT6582 compatible UARTS
9 * "mediatek,mt6589-uart" for MT6589 compatible UARTS
10 * "mediatek,mt6755-uart" for MT6755 compatible UARTS
11 * "mediatek,mt6765-uart" for MT6765 compatible UARTS
12 * "mediatek,mt6779-uart" for MT6779 compatible UARTS
13 * "mediatek,mt6795-uart" for MT6795 compatible UARTS
14 * "mediatek,mt6797-uart" for MT6797 compatible UARTS
[all …]
Dvt8500-uart.txt15 Aliases may be defined to ensure the correct ordering of the uarts.
D8250_omap.yaml7 title: Bindings for 8250 compliant UARTs on TI's OMAP2+ and K3 SoCs
/Linux-v5.15/drivers/net/wireless/broadcom/brcm80211/include/
Dchipcommon.h156 /* UARTs */
233 #define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */
235 #define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */
236 /* UARTs are driven by internal divided clock */
238 #define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */
/Linux-v5.15/Documentation/ia64/
Dserial.rst23 - If there was no HCDP, we assumed there were UARTs at the
106 - Multiple UARTs selected as EFI console devices. EFI and
155 several UARTs. One of the UARTs is often used as a console; the
/Linux-v5.15/drivers/tty/serial/
DKconfig135 This enables the driver for the on-chip UARTs of the Atmel
167 Say Y here if you wish to have the internal AT91 UARTs
170 64). This is necessary if you also want other UARTs, such as
171 external 8250/16C550 compatible UARTs.
204 This enables the driver for the on-chip UARTs of the Amlogic
224 This enables the driver for the on-chip UARTs of the Cirrus
242 Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
252 Internal node for the common case of 4 Samsung compatible UARTs
284 Support for the on-chip UARTs on the NVIDIA Tegra series SOCs
694 Those are UARTs completely different from the Standard UARTs on the
[all …]
/Linux-v5.15/Documentation/arm/samsung-s3c24xx/
Dsuspend.rst89 access to the UARTs will cause the debug to stop.
92 care should be taken that any external clock sources that the UARTs
/Linux-v5.15/arch/parisc/include/asm/
Dserial.h6 * This is used for 16550-compatible UARTs
/Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm7120-l2-intc.txt14 controller, in particular for UARTs
72 have a mux gate, typically UARTs. Setting these bits will make their
/Linux-v5.15/drivers/char/mwave/
DMakefile12 # To have the mwave driver disable other uarts if necessary
/Linux-v5.15/drivers/tty/serial/8250/
DKconfig175 This enables support for FPGA based UARTs found on many MEN
177 and 16z125 UARTs.
369 erratum for Freescale 16550 UARTs in the 8250 driver. It also
470 its UARTs, say Y to this option. If unsure, say N.
D8250_exar.c145 * Exar UARTs have a SLEEP register that enables or disables each UART in exar_pm()
154 * XR17V35x UARTs have an extra fractional divisor register (DLD)
229 * XR17V35x UARTs have an extra divisor register, DLD that gets enabled in default_setup()
592 * These Exar UARTs have an extra interrupt indicator that could fire for a
853 /* Exar Corp. XR17V[48]35[248] Dual/Quad/Octal/Hexa PCIe UARTs */
/Linux-v5.15/arch/mips/include/asm/mach-rc32434/
Dirq.h17 /* 16550 UARTs */
/Linux-v5.15/arch/arm/mach-omap1/
Dserial.c46 * Internal UARTs need to be initialized for the 8250 autoconfig to work
124 /* Don't look at UARTs higher than 2 for omap7xx */ in omap_serial_init()
Dboard-generic.c55 /* mux pins for uarts */ in omap_generic_init()
/Linux-v5.15/include/uapi/linux/
Dserial_core.h39 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
186 /* Altera UARTs */
/Linux-v5.15/arch/arm/mach-ep93xx/include/mach/
Dep93xx-regs.h32 /* APB UARTs */
/Linux-v5.15/arch/x86/kernel/
Djailhouse.c184 * platform UARTs since setup data version 2. in jailhouse_serial_workaround()
186 * In case of version 1, we don't know which UARTs belong Linux. In in jailhouse_serial_workaround()
/Linux-v5.15/include/linux/ssb/
Dssb_driver_extif.h11 * support external devices such as UARTs and the BCM2019 Bluetooth
13 * The external interface core also contains 2 on-chip 16550 UARTs, clock
Dssb_driver_chipcommon.h8 * jtag, 0/1/2 uarts, clock frequency control, a watchdog interrupt timer,
26 #define SSB_CHIPCO_CAP_NRUART 0x00000003 /* # of UARTs */
29 #define SSB_CHIPCO_CAP_UARTCLK_INT 0x00000008 /* UARTs are driven by internal divided clock */
30 #define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
/Linux-v5.15/arch/arm/mach-pxa/include/mach/
Duncompress.h32 /* assume enabled by default for non-PXA uarts */ in uart_is_enabled()
/Linux-v5.15/arch/arm/mach-s3c/
Ddev-uart-s3c64xx.c25 /* 64xx uarts are closer together */
Dpm-core-s3c64xx.h26 /* As a note, since the S3C64XX UARTs generally have multiple in s3c_pm_debug_init_uart()
Dpm-common.c43 * restore the UARTs state yet
/Linux-v5.15/arch/arm/mach-pxa/
Dmxm8x10.c271 /* UARTS */
451 /* PXA UARTs */

123456