Searched full:thunderx2 (Results 1 – 24 of 24) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/arm/ |
D | cavium-thunder2.txt | 1 Cavium ThunderX2 CN99XX platform tree bindings 4 Boards with Cavium ThunderX2 CN99XX SoC shall have the root property: 5 compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
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/Linux-v6.1/arch/arm64/boot/dts/cavium/ |
D | thunder2-99xx.dts | 3 * dts file for Cavium ThunderX2 CN99XX Evaluation Platform 14 model = "Cavium ThunderX2 CN99XX"; 15 compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
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D | thunder2-99xx.dtsi | 3 * dtsi file for Cavium ThunderX2 CN99XX processor 13 model = "Cavium ThunderX2 CN99XX"; 14 compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
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/Linux-v6.1/Documentation/admin-guide/perf/ |
D | thunderx2-pmu.rst | 2 Cavium ThunderX2 SoC Performance Monitoring Unit (PMU UNCORE) 5 The ThunderX2 SoC PMU consists of independent, system-wide, per-socket
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D | index.rst | 20 thunderx2-pmu
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/Linux-v6.1/tools/perf/pmu-events/arch/arm64/ |
D | mapfile.csv | 38 0x00000000420f5160,v1,cavium/thunderx2,core 39 0x00000000430f0af0,v1,cavium/thunderx2,core
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/Linux-v6.1/drivers/perf/ |
D | Kconfig | 141 tristate "Cavium ThunderX2 SoC PMU UNCORE" 146 Provides support for ThunderX2 UNCORE events.
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D | thunderx2_pmu.c | 3 * CAVIUM THUNDERX2 SoC PMU UNCORE 13 /* Each ThunderX2(TX2) Socket has a L3C and DMC UNCORE PMU device. 1052 MODULE_DESCRIPTION("ThunderX2 UNCORE PMU driver");
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/Linux-v6.1/Documentation/devicetree/bindings/arm/bcm/ |
D | brcm,vulcan-soc.yaml | 19 - cavium,thunderx2-cn9900
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/Linux-v6.1/arch/arm64/ |
D | Kconfig.platforms | 317 bool "Cavium ThunderX2 Server Processors" 320 This enables support for Cavium's ThunderX2 CN99XX family of
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D | Kconfig | 1030 bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails" 1033 On Cavium ThunderX2, a load, store or prefetch instruction between a
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/Linux-v6.1/Documentation/devicetree/bindings/iommu/ |
D | arm,smmu-v3.yaml | 69 register access with page 0 offsets. Set for Cavium ThunderX2 silicon that
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/Linux-v6.1/arch/arm64/kernel/ |
D | cpu_errata.c | 597 .desc = "Cavium ThunderX2 erratum 219 (KVM guest sysreg trapping)", 603 .desc = "Cavium ThunderX2 erratum 219 (PRFM removal)",
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/Linux-v6.1/drivers/spi/ |
D | Kconfig | 1073 tristate "Cavium ThunderX2 SPI controller driver" 1076 Enable support for the SPI controller on the Cavium ThunderX2. 1079 If you have a Cavium ThunderX2 platform say Y here.
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/Linux-v6.1/Documentation/arm64/ |
D | silicon-errata.rst | 161 | Cavium | ThunderX2 SMMUv3| #74 | N/A | 163 | Cavium | ThunderX2 SMMUv3| #126 | N/A | 165 | Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |
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/Linux-v6.1/drivers/acpi/arm64/ |
D | iort.c | 1472 * Cavium ThunderX2 implementation doesn't not support unique in arm_smmu_v3_is_combined_irq() 1479 * ThunderX2 doesn't support MSIs from the SMMU, so we're checking in arm_smmu_v3_is_combined_irq() 1490 * Override the size, for Cavium ThunderX2 implementation in arm_smmu_v3_resource_size()
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/Linux-v6.1/drivers/i2c/busses/ |
D | Kconfig | 1202 tristate "Cavium ThunderX2 I2C support" 1206 the Cavium ThunderX2 processors. (Originally on Netlogic XLP SoCs.)
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/Linux-v6.1/drivers/gpio/ |
D | Kconfig | 744 tristate "Cavium ThunderX2 GPIO support" 748 This driver provides support for GPIO interface on Cavium's ThunderX2
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/Linux-v6.1/arch/arm64/crypto/ |
D | poly1305-armv8.pl | 24 # ThunderX2 1.17/+95% 1.36
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/Linux-v6.1/drivers/hwtracing/coresight/ |
D | coresight-etm4x-core.c | 2134 CS_AMBA_UCI_ID(0x000cc0af, uci_id_etm4),/* Marvell ThunderX2 */
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/Linux-v6.1/drivers/pci/ |
D | quirks.c | 4286 * The IOMMU and interrupt controller on Broadcom Vulcan/Cavium ThunderX2 are 4547 case 0xaf84: /* ThunderX2 */ in pci_quirk_cavium_acs_match()
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/Linux-v6.1/drivers/iommu/arm/arm-smmu-v3/ |
D | arm-smmu-v3.c | 3242 * Cavium ThunderX2 implementation doesn't support unique irq in arm_smmu_setup_irqs()
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/Linux-v6.1/drivers/usb/host/ |
D | xhci-ring.c | 1805 * Quirk hanlder for errata seen on Cavium ThunderX2 processor XHCI
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/Linux-v6.1/ |
D | MAINTAINERS | 4724 CAVIUM THUNDERX2 ARM64 SOC
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