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/Linux-v5.15/arch/arm/boot/dts/
Dtegra30.dtsi2 #include <dt-bindings/clock/tegra30-car.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
10 #include "tegra30-peripherals-opp.dtsi"
13 compatible = "nvidia,tegra30";
24 compatible = "nvidia,tegra30-pcie";
117 compatible = "nvidia,tegra30-host1x";
134 compatible = "nvidia,tegra30-mpe";
145 compatible = "nvidia,tegra30-vi";
156 compatible = "nvidia,tegra30-epp";
167 compatible = "nvidia,tegra30-isp";
[all …]
Dtegra114.dtsi155 compatible = "nvidia,tegra114-ictlr", "nvidia,tegra30-ictlr";
167 compatible = "nvidia,tegra114-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
232 compatible = "nvidia,tegra114-ahb", "nvidia,tegra30-ahb";
237 compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
274 * "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
592 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
602 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
612 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
622 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
632 compatible = "nvidia,tegra114-i2s", "nvidia,tegra30-i2s";
[all …]
Dtegra30-cardhu-a02.dts4 #include "tegra30-cardhu.dtsi"
9 model = "NVIDIA Tegra30 Cardhu A02 evaluation board";
10 compatible = "nvidia,cardhu-a02", "nvidia,cardhu", "nvidia,tegra30";
Dtegra30-asus-nexus7-grouper-PM269.dts4 #include "tegra30-asus-nexus7-grouper-ti-pmic.dtsi"
5 #include "tegra30-asus-nexus7-grouper.dtsi"
Dtegra30-asus-nexus7-grouper-E1565.dts4 #include "tegra30-asus-nexus7-grouper-maxim-pmic.dtsi"
5 #include "tegra30-asus-nexus7-grouper.dtsi"
/Linux-v5.15/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
19 nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is
23 compatible with "nvidia,tegra30-i2c" to enable the continue transfer
27 very much similar to Tegra30 I2C controller with some hardware
29 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and
32 - Tegra30/Tegra20 I2C controller has enabled per packet transfer by
51 Tegra20/Tegra30:
/Linux-v5.15/Documentation/devicetree/bindings/timer/
Dnvidia,tegra30-timer.txt1 NVIDIA Tegra30 timer
3 The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
9 - compatible : For Tegra30, must contain "nvidia,tegra30-timer". Otherwise,
10 must contain '"nvidia,<chip>-timer", "nvidia,tegra30-timer"' where
19 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
/Linux-v5.15/Documentation/devicetree/bindings/arm/
Dtegra.yaml45 - const: nvidia,tegra30
51 - const: nvidia,tegra30
55 - const: nvidia,tegra30
61 - const: nvidia,tegra30
66 - const: nvidia,tegra30
69 - const: nvidia,tegra30
73 - const: nvidia,tegra30
76 - const: nvidia,tegra30
/Linux-v5.15/Documentation/devicetree/bindings/devfreq/
Dnvidia,tegra30-actmon.yaml4 $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
7 title: NVIDIA Tegra30 Activity Monitor
23 - nvidia,tegra30-actmon
86 #include <dt-bindings/memory/tegra30-mc.h>
89 compatible = "nvidia,tegra30-mc";
102 compatible = "nvidia,tegra30-emc";
115 compatible = "nvidia,tegra30-actmon";
/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dnvidia,tegra30-i2s.txt1 NVIDIA Tegra30 I2S controller
4 - compatible : For Tegra30, must contain "nvidia,tegra30-i2s". For Tegra124,
16 first, tx (capture) second. See nvidia,tegra30-ahub.txt for values.
21 compatible = "nvidia,tegra30-i2s";
Dnvidia,tegra30-ahub.txt1 NVIDIA Tegra30 AHUB (Audio Hub)
4 - compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
10 - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
21 Tegra30 and later:
53 Tegra30: 3
67 compatible = "nvidia,tegra30-ahub";
Dnvidia,tegra30-hda.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml#
23 - const: nvidia,tegra30-hda
30 - const: nvidia,tegra30-hda
34 - const: nvidia,tegra30-hda
96 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
/Linux-v5.15/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-ahb.txt5 Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain
6 '"nvidia,<chip>-ahb", "nvidia,tegra30-ahb"' where <chip> is tegra124,
9 Tegra20, Tegra30, and Tegra114 chips, the value must be <0x6000c004
/Linux-v5.15/arch/arm/mach-tegra/
DMakefile12 obj-y += sleep-tegra30.o
14 obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o
18 obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o
19 obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o
Dsleep-tegra30.S199 cmp r10, #TEGRA30
200 bne _no_cpu0_chk @ It's not Tegra30
219 cmp r10, #TEGRA30
244 cmp r10, #TEGRA30
250 cmp r10, #TEGRA30
378 cmp r10, #TEGRA30
419 * enabled by the Tegra30 CLK driver on an as-needed basis, see
423 cmp r1, #TEGRA30
460 cmp r10, #TEGRA30
507 cmp r10, #TEGRA30
[all …]
Dpm.c55 case TEGRA30: in tegra_tear_down_cpu_init()
149 * firmware. Note that CPUIDLE won't ever enter powergate on Tegra30 in tegra_sleep_cpu()
183 case TEGRA30: in tegra_pm_set()
210 * which is the case for Tegra30 that has to re-enable the cache in tegra_pm_enter_lp2()
271 case TEGRA30: in tegra_lp1_iram_hook()
301 case TEGRA30: in tegra_sleep_core_init()
376 * which is the case for Tegra30 that has to re-enable the cache in tegra_suspend_enter()
/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra30-mc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-mc.yaml#
7 title: NVIDIA Tegra30 SoC Memory Controller
15 Tegra30 Memory Controller architecturally consists of the following parts:
33 The Tegra30 Memory Controller handles memory requests from internal clients
39 const: nvidia,tegra30-mc
133 compatible = "nvidia,tegra30-mc";
/Linux-v5.15/Documentation/devicetree/bindings/interrupt-controller/
Dnvidia,tegra20-ictlr.txt13 subsequent SoCs remained backwards-compatible with Tegra30, so on
14 Tegra generations later than Tegra30 the compatible value should
15 include "nvidia,tegra30-ictlr".
18 whereas Tegra30 and later have 5).
/Linux-v5.15/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra30-tsensor.yaml4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml#
7 title: NVIDIA Tegra30 Thermal Sensor
32 const: nvidia,tegra30-tsensor
66 compatible = "nvidia,tegra30-tsensor";
/Linux-v5.15/Documentation/devicetree/bindings/fuse/
Dnvidia,tegra20-fuse.txt1 NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 fuse block.
4 - compatible : For Tegra20, must contain "nvidia,tegra20-efuse". For Tegra30,
5 must contain "nvidia,tegra30-efuse". For Tegra114, must contain
15 nvidia,tegra30-efuse, nvidia,tegra114-efuse and nvidia,tegra124-efuse:
/Linux-v5.15/drivers/soc/tegra/
Dflowctrl.c87 case TEGRA30: in flowctrl_cpu_suspend_enter()
95 if (tegra_get_chip_id() == TEGRA30) { in flowctrl_cpu_suspend_enter()
97 * The wfi doesn't work well on Tegra30 because in flowctrl_cpu_suspend_enter()
101 * Note that Tegra30 TRM doc clearly stands that in flowctrl_cpu_suspend_enter()
141 case TEGRA30: in flowctrl_cpu_suspend_exit()
175 { .compatible = "nvidia,tegra30-flowctrl" },
/Linux-v5.15/sound/soc/tegra/
DMakefile9 snd-soc-tegra30-ahub-objs := tegra30_ahub.o
10 snd-soc-tegra30-i2s-objs := tegra30_i2s.o
22 obj-$(CONFIG_SND_SOC_TEGRA30_AHUB) += snd-soc-tegra30-ahub.o
23 obj-$(CONFIG_SND_SOC_TEGRA30_I2S) += snd-soc-tegra30-i2s.o
/Linux-v5.15/Documentation/devicetree/bindings/serial/
Dnvidia,tegra20-hsuart.txt1 NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver.
6 "nvidia,tegra30-hsuart" for Tegra30,
62 compatible = "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart";
/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra30-pinmux.txt1 NVIDIA Tegra30 pinmux controller
3 The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding,
9 - compatible: "nvidia,tegra30-pinmux"
13 Tegra30 adds the following optional properties for pin configuration subnodes:
109 compatible = "nvidia,tegra30-pinmux";
/Linux-v5.15/Documentation/devicetree/bindings/regulator/
Dnvidia,tegra-regulators-coupling.txt5 Thus on Tegra20 there are 3 coupled regulators and on NVIDIA Tegra30
15 Tegra30 voltage coupling
18 On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE

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