Home
last modified time | relevance | path

Searched full:tsc (Results 1 – 25 of 300) sorted by relevance

12345678910>>...12

/Linux-v5.10/drivers/input/touchscreen/
Dimx6ul_tsc.c57 /* TSC registers */
68 /* TSC configuration registers field define */
100 * TSC module need ADC to get the measure value. So
101 * before config TSC, we should initialize ADC module.
103 static int imx6ul_adc_init(struct imx6ul_tsc *tsc) in imx6ul_adc_init() argument
111 reinit_completion(&tsc->completion); in imx6ul_adc_init()
113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
118 if (tsc->average_enable) { in imx6ul_adc_init()
120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; in imx6ul_adc_init()
123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init()
[all …]
Dlpc32xx_ts.c71 static void lpc32xx_fifo_clear(struct lpc32xx_tsc *tsc) in lpc32xx_fifo_clear() argument
73 while (!(tsc_readl(tsc, LPC32XX_TSC_STAT) & in lpc32xx_fifo_clear()
75 tsc_readl(tsc, LPC32XX_TSC_FIFO); in lpc32xx_fifo_clear()
82 struct lpc32xx_tsc *tsc = dev_id; in lpc32xx_ts_interrupt() local
83 struct input_dev *input = tsc->dev; in lpc32xx_ts_interrupt()
85 tmp = tsc_readl(tsc, LPC32XX_TSC_STAT); in lpc32xx_ts_interrupt()
89 lpc32xx_fifo_clear(tsc); in lpc32xx_ts_interrupt()
100 !(tsc_readl(tsc, LPC32XX_TSC_STAT) & in lpc32xx_ts_interrupt()
102 tmp = tsc_readl(tsc, LPC32XX_TSC_FIFO); in lpc32xx_ts_interrupt()
126 static void lpc32xx_stop_tsc(struct lpc32xx_tsc *tsc) in lpc32xx_stop_tsc() argument
[all …]
Dtps6507x-ts.c50 static int tps6507x_read_u8(struct tps6507x_ts *tsc, u8 reg, u8 *data) in tps6507x_read_u8() argument
52 return tsc->mfd->read_dev(tsc->mfd, reg, 1, data); in tps6507x_read_u8()
55 static int tps6507x_write_u8(struct tps6507x_ts *tsc, u8 reg, u8 data) in tps6507x_write_u8() argument
57 return tsc->mfd->write_dev(tsc->mfd, reg, 1, &data); in tps6507x_write_u8()
60 static s32 tps6507x_adc_conversion(struct tps6507x_ts *tsc, in tps6507x_adc_conversion() argument
69 ret = tps6507x_write_u8(tsc, TPS6507X_REG_TSCMODE, tsc_mode); in tps6507x_adc_conversion()
71 dev_err(tsc->dev, "TSC mode read failed\n"); in tps6507x_adc_conversion()
77 ret = tps6507x_write_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
80 dev_err(tsc->dev, "ADC config write failed\n"); in tps6507x_adc_conversion()
85 ret = tps6507x_read_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
[all …]
Dtsc2007_iio.c42 struct tsc2007 *tsc = iio->ts; in tsc2007_read_raw() local
52 mutex_lock(&tsc->mlock); in tsc2007_read_raw()
56 *val = tsc2007_xfer(tsc, READ_X); in tsc2007_read_raw()
59 *val = tsc2007_xfer(tsc, READ_Y); in tsc2007_read_raw()
62 *val = tsc2007_xfer(tsc, READ_Z1); in tsc2007_read_raw()
65 *val = tsc2007_xfer(tsc, READ_Z2); in tsc2007_read_raw()
68 *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX)); in tsc2007_read_raw()
73 tc.x = tsc2007_xfer(tsc, READ_X); in tsc2007_read_raw()
74 tc.z1 = tsc2007_xfer(tsc, READ_Z1); in tsc2007_read_raw()
75 tc.z2 = tsc2007_xfer(tsc, READ_Z2); in tsc2007_read_raw()
[all …]
Dtsc2007_core.c30 int tsc2007_xfer(struct tsc2007 *tsc, u8 cmd) in tsc2007_xfer() argument
35 data = i2c_smbus_read_word_data(tsc->client, cmd); in tsc2007_xfer()
37 dev_err(&tsc->client->dev, "i2c io error: %d\n", data); in tsc2007_xfer()
47 dev_dbg(&tsc->client->dev, "data: 0x%x, val: 0x%x\n", data, val); in tsc2007_xfer()
52 static void tsc2007_read_values(struct tsc2007 *tsc, struct ts_event *tc) in tsc2007_read_values() argument
55 tc->y = tsc2007_xfer(tsc, READ_Y); in tsc2007_read_values()
58 tc->x = tsc2007_xfer(tsc, READ_X); in tsc2007_read_values()
61 tc->z1 = tsc2007_xfer(tsc, READ_Z1); in tsc2007_read_values()
62 tc->z2 = tsc2007_xfer(tsc, READ_Z2); in tsc2007_read_values()
65 tsc2007_xfer(tsc, PWRDOWN); in tsc2007_read_values()
[all …]
Dcy8ctmg110_ts.c62 static int cy8ctmg110_write_regs(struct cy8ctmg110 *tsc, unsigned char reg, in cy8ctmg110_write_regs() argument
65 struct i2c_client *client = tsc->client; in cy8ctmg110_write_regs()
83 static int cy8ctmg110_read_regs(struct cy8ctmg110 *tsc, in cy8ctmg110_read_regs() argument
86 struct i2c_client *client = tsc->client; in cy8ctmg110_read_regs()
111 static int cy8ctmg110_touch_pos(struct cy8ctmg110 *tsc) in cy8ctmg110_touch_pos() argument
113 struct input_dev *input = tsc->input; in cy8ctmg110_touch_pos()
120 if (cy8ctmg110_read_regs(tsc, reg_p, 9, CY8CTMG110_TOUCH_X1) != 0) in cy8ctmg110_touch_pos()
159 struct cy8ctmg110 *tsc = dev_id; in cy8ctmg110_irq_thread() local
161 cy8ctmg110_touch_pos(tsc); in cy8ctmg110_irq_thread()
/Linux-v5.10/drivers/thermal/
Drcar_gen3_thermal.c91 void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
94 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc, in rcar_gen3_thermal_read() argument
97 return ioread32(tsc->base + reg); in rcar_gen3_thermal_read()
100 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc, in rcar_gen3_thermal_write() argument
103 iowrite32(data, tsc->base + reg); in rcar_gen3_thermal_write()
134 static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_tsc *tsc, in rcar_gen3_thermal_calc_coefs() argument
144 tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157) in rcar_gen3_thermal_calc_coefs()
147 tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]), in rcar_gen3_thermal_calc_coefs()
148 tsc->tj_t - FIXPT_INT(TJ_3)); in rcar_gen3_thermal_calc_coefs()
149 tsc->coef.b1 = FIXPT_INT(thcode[2]) - tsc->coef.a1 * TJ_3; in rcar_gen3_thermal_calc_coefs()
[all …]
/Linux-v5.10/arch/x86/kernel/
Dtsc_sync.c3 * check TSC synchronization.
7 * We check whether all boot CPUs have their TSC's synchronized,
8 * print a warning if not and turn off the TSC clock-source.
23 #include <asm/tsc.h>
35 * TSC's on different sockets may be reset asynchronously.
36 * This may cause the TSC ADJUST value on socket 0 to be NOT 0.
45 pr_info("tsc: Marking TSC async resets true due to %s\n", reason); in mark_tsc_async_resets()
56 /* Skip unnecessary error messages if TSC already unstable */ in tsc_verify_tsc_adjust()
74 pr_warn(FW_BUG "TSC ADJUST differs: CPU%u %lld --> %lld. Restoring\n", in tsc_verify_tsc_adjust()
92 * the TSC is in sync with the already running cpus. in tsc_sanitize_first_cpu()
[all …]
Dtsc.c32 unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */
41 * TSC can be unstable due to cpufreq or due to unsynced TSCs
227 * Fall back to jiffies if there's no TSC available: in native_sched_clock()
228 * ( But note that we still use it if the TSC is marked in native_sched_clock()
240 * Generate a sched_clock if you already have a TSC value.
242 u64 native_sched_clock_from_tsc(u64 tsc) in native_sched_clock_from_tsc() argument
244 return cycles_2_ns(tsc); in native_sched_clock_from_tsc()
280 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
308 __setup("tsc=", tsc_setup);
314 * Read TSC and the reference counters. Take care of any disturbances
[all …]
Dtsc_msr.c3 * TSC frequency enumeration via MSR
17 #include <asm/tsc.h>
161 * MSR-based CPU/TSC frequency discovery for certain CPUs.
218 * TSC frequency determined by MSR is always considered "known" in cpu_khz_from_msr()
227 * TSC is reliable. We were told by silicon design team that TSC in cpu_khz_from_msr()
228 * on Atom SoCs are always "reliable". TSC is also the only in cpu_khz_from_msr()
230 * or not functional) so mark TSC reliable which removes the in cpu_khz_from_msr()
/Linux-v5.10/Documentation/virt/kvm/
Dtimekeeping.rst14 3) TSC Hardware
37 First we discuss the basic hardware devices available. TSC and the related
324 3. TSC Hardware
327 The TSC or time stamp counter is relatively simple in theory; it counts
332 The TSC is represented internally as a 64-bit MSR which can be read with the
334 limitations made it possible to write the TSC, but generally on old hardware it
339 write the TSC MSR is not an architectural guarantee.
341 The TSC is accessible from CPL-0 and conditionally, for CPL > 0 software by
342 means of the CR4.TSD bit, which when enabled, disables CPL > 0 TSC access.
345 atomically not just the TSC, but an indicator which corresponds to the
[all …]
/Linux-v5.10/tools/power/cpupower/utils/idle_monitor/
Dmperf_monitor.c67 * 1) calculated after measurements if we know TSC ticks at mperf/P0 frequency
83 static int mperf_get_tsc(unsigned long long *tsc) in mperf_get_tsc() argument
87 ret = read_msr(base_cpu, MSR_TSC, tsc); in mperf_get_tsc()
89 dprint("Reading TSC MSR failed, returning %llu\n", *tsc); in mperf_get_tsc()
174 dprint("%s: TSC Ref - mperf_diff: %llu, tsc_diff: %llu\n", in mperf_get_count_percent()
208 /* Calculate max_freq from TSC count */ in mperf_get_count_freq()
217 (max_freq_mode == MAX_FREQ_TSC_REF) ? "TSC calculated" : "sysfs read"); in mperf_get_count_freq()
237 dprint("TSC diff: %llu\n", dbg - tsc_at_measure_start); in mperf_start()
253 dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end); in mperf_stop()
262 * we use TSC counter if it reliably ticks at P0/mperf frequency.
[all …]
Dnhm_idle.c27 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF }; enumerator
89 case TSC: in nhm_get_count()
131 nhm_get_count(TSC, &tsc_at_measure_start, base_cpu); in nhm_start()
139 nhm_get_count(TSC, &dbg, base_cpu); in nhm_start()
140 dprint("TSC diff: %llu\n", dbg - tsc_at_measure_start); in nhm_start()
150 nhm_get_count(TSC, &tsc_at_measure_end, base_cpu); in nhm_stop()
158 nhm_get_count(TSC, &dbg, base_cpu); in nhm_stop()
159 dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end); in nhm_stop()
212 .overflow_s = 922000000 /* 922337203 seconds TSC overflow
/Linux-v5.10/Documentation/devicetree/bindings/input/touchscreen/
Dlpc32xx-tsc.txt1 * NXP LPC32xx SoC Touchscreen Controller (TSC)
4 - compatible: must be "nxp,lpc3220-tsc"
7 - interrupts: The TSC/ADC interrupt
11 tsc@40048000 {
12 compatible = "nxp,lpc3220-tsc";
Dimx6ul_tsc.txt4 - compatible: must be "fsl,imx6ul-tsc".
8 - clock-names; must be "tsc" and "adc".
24 tsc: tsc@2040000 {
25 compatible = "fsl,imx6ul-tsc";
31 clock-names = "tsc", "adc";
Dti-tsc-adc.txt1 * TI - TSC ADC (Touschscreen and analog digital converter)
9 - child "tsc"
10 compatible: Should be "ti,am3359-tsc".
40 - child "tsc"
77 tsc {
/Linux-v5.10/arch/x86/include/asm/xen/
Dcpuid.h78 * Sub-leaf 0: EAX: bit 0: emulated tsc
79 * bit 1: host tsc is known to be reliable
83 * ECX: guest tsc frequency in kHz
84 * EDX: guest tsc incarnation (migration count)
85 * Sub-leaf 1: EAX: tsc offset low part
86 * EBX: tsc offset high part
87 * ECX: multiplicator for tsc->ns conversion
88 * EDX: shift amount for tsc->ns conversion
89 * Sub-leaf 2: EAX: host tsc frequency in kHz
/Linux-v5.10/tools/testing/selftests/kvm/x86_64/
Dvmx_preemption_timer_test.c141 * tsc deadlines so that host can verify they are as expected in l1_guest_code()
221 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
224 pr_info("Stage %d: L2 PT expiry TSC (%lu) , L2 TSC deadline (%lu)\n", in main()
228 "Stage %d: L1 PT expiry TSC (%lu) < L1 TSC deadline (%lu)", in main()
232 "Stage %d: L2 PT expiry TSC (%lu) > L2 TSC deadline (%lu)", in main()
/Linux-v5.10/tools/perf/pmu-events/arch/x86/broadwellde/
Dbdwde-metrics.json94 "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@",
124 "MetricExpr": "(cstate_core@c3\\-residency@ / msr@tsc@) * 100",
130 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100",
136 "MetricExpr": "(cstate_core@c7\\-residency@ / msr@tsc@) * 100",
142 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100",
148 "MetricExpr": "(cstate_pkg@c3\\-residency@ / msr@tsc@) * 100",
154 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100",
160 "MetricExpr": "(cstate_pkg@c7\\-residency@ / msr@tsc@) * 100",
/Linux-v5.10/arch/x86/include/asm/
Dstackprotector.h39 #include <asm/tsc.h>
69 u64 tsc; in boot_init_stack_canary() local
75 * We both use the random pool and the current TSC as a source in boot_init_stack_canary()
76 * of randomness. The TSC only matters for very early init, in boot_init_stack_canary()
81 tsc = rdtsc(); in boot_init_stack_canary()
82 canary += tsc + (tsc << 32UL); in boot_init_stack_canary()
/Linux-v5.10/tools/perf/arch/x86/tests/
Dperf-time-to-tsc.c20 #include "tsc.h"
41 * test__perf_time_to_tsc - test converting perf time to TSC.
44 * to and from TSC is consistent with the order of events. If the test passes
45 * %0 is returned, otherwise %-1 is returned. If TSC conversion is not
153 pr_debug("1st event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
155 pr_debug("rdtsc time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
157 pr_debug("2nd event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
/Linux-v5.10/include/trace/events/
Dmce.h27 __field( u64, tsc )
47 __entry->tsc = m->tsc;
58 …x, IPID: %016Lx, ADDR/MISC/SYND: %016Lx/%016Lx/%016Lx, RIP: %02x:<%016Lx>, TSC: %llx, PROCESSOR: %…
65 __entry->tsc,
/Linux-v5.10/tools/testing/selftests/prctl/
D.gitignore2 disable-tsc-ctxt-sw-stress-test
3 disable-tsc-on-off-stress-test
4 disable-tsc-test
DMakefile7 TEST_PROGS := disable-tsc-ctxt-sw-stress-test disable-tsc-on-off-stress-test \
8 disable-tsc-test
/Linux-v5.10/drivers/clocksource/
Dhyperv_timer.c302 * the other that uses the TSC reference page feature as defined in the
304 * Hyper-V and 32-bit x86. The TSC reference page version is preferred.
307 * TSC clocksource rating of 300. In configurations where Hyper-V offers
308 * an InvariantTSC, the TSC is not marked "unstable", so the TSC clocksource
310 * default. On older hardware and Hyper-V versions, the TSC is marked
311 * "unstable", so no TSC clocksource is created and the selected Hyper-V
354 /* Disable the TSC page */ in suspend_hv_clock_tsc()
366 /* Re-enable the TSC page */ in resume_hv_clock_tsc()
456 * Try to set up the TSC page clocksource. If it succeeds, we're in hv_init_clocksource()

12345678910>>...12