| /Linux-v6.6/arch/arm64/ |
| D | Kconfig.platforms | 1 # SPDX-License-Identifier: GPL-2.0-only
9 This enables support for the Actions Semiconductor S900 SoC family.
12 bool "Allwinner sunxi 64-bit SoC Family"
27 Soc family.
30 bool "Apple Silicon SoC family"
33 This enables support for Apple's in-house ARM SoC family, starting
37 bool "Broadcom SoC Support"
52 This enables support for the Broadcom BCM2837 and BCM2711 SoC.
56 bool "Broadcom iProc SoC Family"
64 bool "Broadcom Broadband Carrier Access (BCA) origin SoC"
[all …]
|
| /Linux-v6.6/Documentation/ABI/testing/ |
| D | sysfs-devices-soc | 5 The /sys/devices/ directory contains a sub-directory for each
6 System-on-Chip (SoC) device on a running platform. Information
7 regarding each SoC can be obtained by reading sysfs files. This
10 The directory created for each SoC will also house information
12 It has been agreed that if an SoC device exists, its supported
13 devices would be better suited to appear as children of that SoC.
19 Read-only attribute common to all SoCs. Contains the SoC machine
26 Read-only attribute common to all SoCs. Contains SoC family name
30 this will contain the JEDEC JEP106 manufacturer’s identification
34 This manufacturer’s identification code is defined by one
[all …]
|
| /Linux-v6.6/drivers/pcmcia/ |
| D | sa1111_generic.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <asm/mach-types.h>
70 struct sa1111_pcmcia_socket *s = to_skt(skt); in sa1111_pcmcia_socket_state() local
71 u32 status = readl_relaxed(s->dev->mapbase + PCSR); in sa1111_pcmcia_socket_state()
73 switch (skt->nr) { in sa1111_pcmcia_socket_state()
75 state->detect = status & PCSR_S0_DETECT ? 0 : 1; in sa1111_pcmcia_socket_state()
76 state->ready = status & PCSR_S0_READY ? 1 : 0; in sa1111_pcmcia_socket_state()
77 state->bvd1 = status & PCSR_S0_BVD1 ? 1 : 0; in sa1111_pcmcia_socket_state()
78 state->bvd2 = status & PCSR_S0_BVD2 ? 1 : 0; in sa1111_pcmcia_socket_state()
79 state->wrprot = status & PCSR_S0_WP ? 1 : 0; in sa1111_pcmcia_socket_state()
[all …]
|
| /Linux-v6.6/arch/arm/mach-at91/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
14 bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
18 Select this if you are using an SoC from Microchip's SAME7, SAMS7 or SAMV7
34 Select this if ou are using one of Microchip's SAMA5D2 family SoC.
45 Select this if you are using one of Microchip's SAMA5D3 family SoC.
59 Select this if you are using one of Microchip's SAMA5D4 family SoC.
70 Select this if you are using one of Microchip's SAMA7G5 family SoC.
73 bool "ARMv7 based Microchip LAN966 SoC family"
79 This enables support for ARMv7 based Microchip LAN966 SoC family.
93 Select this if you are using Microchip's AT91RM9200 SoC.
[all …]
|
| /Linux-v6.6/drivers/phy/samsung/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "Exynos SoC series Display Port PHY driver"
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
21 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
29 Enable PCIe PHY support for Exynos SoC series.
33 tristate "Exynos SoC series UFS PHY driver"
37 Enable this to support the Samsung Exynos SoC UFS PHY driver for
42 tristate "S5P/Exynos SoC series USB 2.0 PHY driver"
51 2.0 PHY. Support for particular PHYs will be enabled based on the SoC
76 particular SoC is compiled in the driver. In case of S5PV210 two phys
[all …]
|
| /Linux-v6.6/drivers/pinctrl/freescale/ |
| D | pinctrl-mxs.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include "pinctrl-mxs.h"
28 struct mxs_pinctrl_soc_data *soc; member
35 return d->soc->ngroups; in mxs_get_groups_count()
43 return d->soc->groups[group].name; in mxs_get_group_name()
51 *pins = d->soc->groups[group].pins; in mxs_get_group_pins()
52 *num_pins = d->soc->groups[group].npins; in mxs_get_group_pins()
57 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, in mxs_pin_dbg_show() argument
60 seq_printf(s, " %s", dev_name(pctldev->dev)); in mxs_pin_dbg_show()
72 int length = strlen(np->name) + SUFFIX_LEN; in mxs_dt_node_to_map()
[all …]
|
| /Linux-v6.6/drivers/memory/tegra/ |
| D | mc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
18 #include <linux/tegra-icc.h>
20 #include <soc/tegra/fuse.h>
26 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
29 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
32 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
35 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
38 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
41 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
[all …]
|
| D | tegra20.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <dt-bindings/memory/tegra20-mc.h>
285 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_assert()
287 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
288 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
290 spin_unlock_irqrestore(&mc->lock, flags); in tegra20_mc_hotreset_assert()
301 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_deassert()
303 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_deassert()
304 mc_writel(mc, value | BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_deassert()
306 spin_unlock_irqrestore(&mc->lock, flags); in tegra20_mc_hotreset_deassert()
[all …]
|
| /Linux-v6.6/drivers/phy/tegra/ |
| D | xusb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
20 #include <soc/tegra/fuse.h>
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
[all …]
|
| /Linux-v6.6/drivers/pinctrl/nomadik/ |
| D | pinctrl-abx500.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2013
29 #include <linux/pinctrl/pinconf-generic.h>
36 #include "../pinctrl-utils.h"
38 #include "pinctrl-abx500.h"
86 struct abx500_pinctrl_soc_data *soc; member
102 ret = abx500_get_register_interruptible(pct->dev, in abx500_gpio_get_bit()
105 dev_err(pct->dev, in abx500_gpio_get_bit()
106 "%s read reg =%x, offset=%x failed (%d)\n", in abx500_gpio_get_bit()
124 ret = abx500_mask_and_set_register_interruptible(pct->dev, in abx500_gpio_set_bits()
[all …]
|
| /Linux-v6.6/drivers/bus/ |
| D | mvebu-mbus.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 * - One to configure the access of the CPU to the devices. Depending
17 * - One to configure the access to the CPU to the SDRAM. There are
23 * - Reads out the SDRAM address decoding windows at initialization
30 * devices have to configure those device -> SDRAM windows to ensure
33 * - Provides an API for platform code or device drivers to
34 * dynamically add or remove address decoding windows for the CPU ->
39 * - Provides a debugfs interface in /sys/kernel/debug/mvebu-mbus/ to
40 * see the list of CPU -> SDRAM windows and their configuration
41 * (file 'sdram') and the list of CPU -> devices windows and their
[all …]
|
| /Linux-v6.6/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
88 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
89 pctl->groups[n].npins) in mvebu_pinctrl_find_group_by_pid()
[all …]
|
| /Linux-v6.6/sound/soc/fsl/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "SoC Audio for Freescale CPUs"
4 comment "Common SoC Audio options for Freescale CPUs:"
14 This option is only useful for out-of-tree drivers since
15 in-tree drivers select it automatically.
26 This option is only useful for out-of-tree drivers since
27 in-tree drivers select it automatically.
36 This option is only useful for out-of-tree drivers since
37 in-tree drivers select it automatically.
54 This option is only useful for out-of-tree drivers since
[all …]
|
| /Linux-v6.6/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
10 * Copyright (C) 2009-2011 ST-Ericsson AB
27 #include "../pinctrl-utils.h"
28 #include "pinctrl-tegra.h"
32 return readl(pmx->regs[bank] + reg); in pmx_readl()
37 writel_relaxed(val, pmx->regs[bank] + reg); in pmx_writel()
46 return pmx->soc->ngroups; in tegra_pinctrl_get_groups_count()
54 return pmx->soc->groups[group].name; in tegra_pinctrl_get_group_name()
64 *pins = pmx->soc->groups[group].pins; in tegra_pinctrl_get_group_pins()
[all …]
|
| /Linux-v6.6/drivers/iommu/ |
| D | tegra-smmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2014 NVIDIA CORPORATION. All rights reserved.
17 #include <linux/dma-mapping.h>
19 #include <soc/tegra/ahb.h>
20 #include <soc/tegra/mc.h>
25 const struct tegra_smmu_group_soc *soc; member
35 const struct tegra_smmu_soc *soc; member
73 writel(value, smmu->regs + offset); in smmu_writel()
78 return readl(smmu->regs + offset); in smmu_readl()
88 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
[all …]
|
| /Linux-v6.6/drivers/soc/fsl/ |
| D | guts.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
28 /* SoC die attribute definition for QorIQ platform */
31 * Power Architecture-based SoCs T Series
34 /* Die: T4240, SoC: T4240/T4160/T4080 */
39 /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */
44 /* Die: T2080, SoC: T2080/T2081 */
49 /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */
56 * ARM-based SoCs LS Series
59 /* Die: LS1043A, SoC: LS1043A/LS1023A */
64 /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */
[all …]
|
| /Linux-v6.6/drivers/pinctrl/qcom/ |
| D | pinctrl-msm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 #include <linux/pinctrl/pinconf-generic.h>
28 #include <linux/soc/qcom/irq.h>
32 #include "../pinctrl-utils.h"
34 #include "pinctrl-msm.h"
41 * struct msm_pinctrl - state for a pinctrl-msm device
57 * @soc: Reference to soc_data of platform specific data.
80 const struct msm_pinctrl_soc_data *soc; member
89 return readl(pctrl->regs[g->tile] + g->name##_reg); \
94 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
[all …]
|
| /Linux-v6.6/drivers/thermal/tegra/ |
| D | soctherm.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014 - 2018, NVIDIA CORPORATION. All rights reserved.
34 #include <dt-bindings/thermal/tegra124-soctherm.h>
197 #define REG_GET_MASK(r, m) (((r) & (m)) >> (ffs(m) - 1))
200 (((v) & (m >> (ffs(m) - 1))) << (ffs(m) - 1)))
203 #define THROT_DEPTH_DIVIDEND(depth) ((256 * (100 - (depth)) / 100) - 1)
205 /* gk20a nv_therm interface N:3 Mapping. Levels defined in tegra124-soctherm.h
212 #define THROT_LEVEL_TO_DEPTH(level) ((0x1 << (level)) - 1)
229 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
232 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
[all …]
|
| /Linux-v6.6/drivers/reset/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
12 via GPIOs or SoC-internal reset controller modules.
30 AR71xx SoC reset controller.
96 bool "Reset controller driver for Canaan Kendryte K210 SoC"
101 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
123 This driver supports switch core reset for the Microchip Sparx5 SoC.
137 Amlogic's A113 based SoCs
151 This enables the reset controller driver for Nuvoton MA35D1 SoC.
160 bool "Microchip PolarFire SoC (MPFS) Reset Driver"
165 This driver supports peripheral reset for the Microchip PolarFire SoC
[all …]
|
| /Linux-v6.6/drivers/pinctrl/intel/ |
| D | pinctrl-intel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
38 * struct intel_function - Description about a function
48 * struct intel_padgroup - Hardware pad group information
67 * enum - Special treatment for GPIO base in pad group
74 INTEL_GPIO_BASE_ZERO = -2,
75 INTEL_GPIO_BASE_NOMAP = -1,
80 * struct intel_community - Intel pin community description
100 * @pad_map: Optional non-linear mapping of the pads
145 #define __INTEL_COMMUNITY(b, s, e, g, n, gs, gn, soc) \ argument
[all …]
|
| /Linux-v6.6/drivers/net/mdio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
54 interface units of the Allwinner SoC that have an EMAC (A10,
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
71 controllers found in the ASPEED AST2600 SoC. This is a driver for the
72 third revision of the ASPEED MDIO register interface - the first two
94 Broadcom iProc SoC's.
109 tristate "GPIO lib-based bitbanged MDIO buses"
113 Supports GPIO lib-based MDIO busses.
[all …]
|
| /Linux-v6.6/Documentation/devicetree/bindings/power/reset/ |
| D | keystone-reset.txt | 3 This node is intended to allow SoC reset in case of software reset
7 SoC. Each watchdog timer event input is connected to the Reset Mux
14 - compatible: ti,keystone-reset
16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
26 - ti,soft-reset: Boolean option indicating soft reset.
29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
30 to WDT driver, it's just needed to enable a SoC related
31 reset that's triggered by one of WDTs. The list is
33 begins from 0 to 3, as keystone can contain up to 4 SoC
[all …]
|
| /Linux-v6.6/sound/soc/atmel/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
25 tristate "SoC PCM DAI support for AT91 SSC controller using PDC"
31 in PDC mode configured using audio-graph-card in device-tree.
34 tristate "SoC PCM DAI support for AT91 SSC controller using DMA"
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
69 Say Y if you want to add support for audio SoC on an
[all …]
|
| /Linux-v6.6/sound/soc/samsung/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
25 tristate "SoC I2S Audio support for WM8994 on SMDK"
31 Say Y if you want to add support for SoC audio on the SMDKs.
34 tristate "SoC S/PDIF Audio support for SMDK"
37 Say Y if you want to add support for SoC S/PDIF audio on the SMDK.
40 tristate "SoC PCM Audio support for WM8994 on SMDK"
46 Say Y if you want to add support for SoC audio on the SMDK
119 tristate "SoC I2S Audio support for WM5110 on TM2 board"
126 Say Y if you want to add support for SoC audio on the TM2 board.
129 tristate "SoC I2S Audio support for WM8994 on Aries"
[all …]
|
| /Linux-v6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
47 what pinmux functions this SoC supports.
[all …]
|
