| /Linux-v5.15/Documentation/devicetree/bindings/net/ |
| D | mediatek-dwmac.txt | 26 It should be defined for RMII interface when the reference clock is from MT2712 SoC.
29 It should be defined for RMII interface.
32 Both delay properties need to be a multiple of 550 for MII/RMII interface,
35 - mediatek,rmii-rxc: boolean property, if present indicates that the RMII
39 - mediatek,rmii-clk-from-mac: boolean property, if present indicates that
40 MT2712 SoC provides the RMII reference clock, which outputs to TXC pin only.
44 which is from external PHYs in RMII case, and it rarely happen.
45 3. the reference clock, which outputs to TXC pin will be inversed in RMII case
49 2. reference clock will be inversed when arrived at MAC in RMII case, when
51 3. the inside clock, which be sent to MAC, will be inversed in RMII case when
[all …]
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| D | micrel.txt | 22 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
25 Setting the RMII Reference Clock Select bit enables 25 MHz rather
30 Specifically, a clock reference ("rmii-ref" below) is always needed to
36 - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
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| D | ftgmac100.txt | 20 absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
23 rmii (100bT) but kept as a separate property in case NC-SI grows support
29 IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
34 - "RCLK": Clock gate for the RMII RCLK
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| D | actions,owl-emac.yaml | 14 It provides the RMII and SMII interfaces and is compliant with the
44 - const: rmii
77 clock-names = "eth", "rmii";
79 phy-mode = "rmii";
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| D | cpsw-phy-sel.txt | 13 -rmii-clock-ext : If present, the driver will configure the RMII
29 rmii-clock-ext;
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| D | lpc-eth.txt | 10 absent, "rmii" is assumed.
26 phy-mode = "rmii";
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| D | davinci_emac.txt | 23 - ti,davinci-rmii-en: 1 byte, 1 means use RMII
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| D | adi,adin.yaml | 35 When operating in RMII mode, this option configures the FIFO depth.
61 phy-mode = "rmii";
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| /Linux-v5.15/arch/powerpc/boot/dts/ |
| D | kmeter1.dts | 346 /* Piggy2 (UCC4, MDIO 0x00, RMII) */
358 phy-connection-type = "rmii";
362 /* Eth-1 (UCC5, MDIO 0x08, RMII) */
374 phy-connection-type = "rmii";
378 /* Eth-2 (UCC6, MDIO 0x09, RMII) */
390 phy-connection-type = "rmii";
394 /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
406 phy-connection-type = "rmii";
410 /* Eth-4 (UCC8, MDIO 0x0b, RMII) */
422 phy-connection-type = "rmii";
[all …]
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| /Linux-v5.15/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-mediatek.c | 88 * only in RMII(when MAC provides the reference clock), and useless for in mt2712_set_interface()
89 * RGMII/MII/RMII(when PHY provides the reference clock). in mt2712_set_interface()
129 /* 550ps per stage for MII/RMII */ in mt2712_delay_ps2stage()
154 /* 550ps per stage for MII/RMII */ in mt2712_delay_stage2ps()
191 /* case 1: mac provides the rmii reference clock, in mt2712_set_delay()
204 /* case 2: the rmii reference clock is from external phy, in mt2712_set_delay()
211 /* the rmii reference clock from outside is connected in mt2712_set_delay()
219 /* the rmii reference clock from outside is connected in mt2712_set_delay()
309 plat->rmii_rxc = of_property_read_bool(plat->np, "mediatek,rmii-rxc"); in mediatek_dwmac_config_dt()
310 plat->rmii_clk_from_mac = of_property_read_bool(plat->np, "mediatek,rmii-clk-from-mac"); in mediatek_dwmac_config_dt()
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| D | dwmac-rk.c | 129 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in px30_set_rmii_speed()
238 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3128_set_rmii_speed()
315 /* set MAC to RMII mode */ in rk3228_set_to_rmii()
359 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3228_set_rmii_speed()
476 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3288_set_rmii_speed()
526 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3308_set_rmii_speed()
651 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3328_set_rmii_speed()
768 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3366_set_rmii_speed()
879 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3368_set_rmii_speed()
990 dev_err(dev, "unknown speed value for RMII! speed=%d", speed); in rk3399_set_rmii_speed()
[all …]
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| /Linux-v5.15/drivers/pinctrl/qcom/ |
| D | pinctrl-ipq4019.c | 517 FUNCTION(rmii),
595 PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
597 PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
599 PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
601 PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
603 PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
605 PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
607 PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
609 PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
611 PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
[all …]
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | imx6ul-kontron-n6x1x-som-common.dtsi | 32 phy-mode = "rmii";
44 clock-names = "rmii-ref";
50 phy-mode = "rmii";
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| D | at91sam9x25ek.dts | 22 phy-mode = "rmii";
27 phy-mode = "rmii";
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| D | imx53-kp-hsc.dts | 18 fixed-link { /* RMII fixed link to LAN9303 */
35 port@0 { /* RMII fixed link to master */
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| D | am335x-icev2.dts | 204 /* Slave 1, RMII mode */
213 /* Slave 2, RMII mode */
471 /* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
479 phy-mode = "rmii";
485 phy-mode = "rmii";
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| D | vf610-bk4.dts | 161 phy-mode = "rmii";
174 clock-names = "rmii-ref";
180 phy-mode = "rmii";
193 clock-names = "rmii-ref";
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| D | uniphier-pinctrl.dtsi | 69 pinctrl_ether_rmii: ether-rmii {
79 pinctrl_ether1_rmii: ether1-rmii {
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| D | imx6ul-phytec-phycore-som.dtsi | 43 phy-mode = "rmii";
57 clock-names = "rmii-ref";
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| D | imx6qp-prtwd3.dts | 72 clock-names = "rmii-ref";
151 phy-mode = "rmii";
158 phy-mode = "rmii";
165 phy-mode = "rmii";
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| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-gmii-sel.yaml | 15 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
31 | | | RMII <------->
89 - RMII refclk mode
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| /Linux-v5.15/drivers/net/ethernet/arc/ |
| D | emac_rockchip.c | 120 /* RK3036/RK3066/RK3188 SoCs only support RMII */ in emac_rockchip_probe()
183 /* Set RMII mode */ in emac_rockchip_probe()
194 /* RMII interface needs always a rate of 50MHz */ in emac_rockchip_probe()
217 /* RMII TX/RX needs always a rate of 25MHz */ in emac_rockchip_probe()
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| /Linux-v5.15/arch/arm/mach-davinci/ |
| D | Kconfig | 179 bool "RMII Ethernet PHY"
181 Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x
185 not be functional if RMII mode is selected.
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| /Linux-v5.15/Documentation/networking/dsa/ |
| D | sja1105.rst | 302 RMII PHY role and out-of-band signaling
305 In the RMII spec, the 50 MHz clock signals are either driven by the MAC or by
310 On the other hand, the SJA1105 is only binary configurable - when in the RMII
312 happening it must be put in RMII PHY role.
314 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].
317 mechanism defined by the RMII spec.
319 clock signal, inevitably an RMII PHY-to-PHY connection is created. The SJA1105
328 The take-away is that in RMII mode, the SJA1105 must be let to drive the
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| /Linux-v5.15/Documentation/devicetree/bindings/net/dsa/ |
| D | lan9303.txt | 31 fixed-link { /* RMII fixed link to LAN9303 */
47 port@0 { /* RMII fixed link to master */
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