/Linux-v5.4/include/linux/phy/ |
D | phy.h | 3 * phy.h -- generic phy header file 19 #include <linux/phy/phy-mipi-dphy.h> 21 struct phy; 45 * union phy_configure_opts - Opaque generic phy configuration 48 * the MIPI_DPHY phy mode. 55 * struct phy_ops - set of function pointers for performing phy operations 56 * @init: operation to be performed for initializing phy 58 * @power_on: powering on the phy 59 * @power_off: powering off the phy 60 * @set_mode: set the mode of the phy [all …]
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/Linux-v5.4/drivers/phy/ |
D | phy-core.c | 3 * phy-core.c -- Generic Phy framework. 17 #include <linux/phy/phy.h> 30 struct phy *phy = *(struct phy **)res; in devm_phy_release() local 32 phy_put(phy); in devm_phy_release() 44 struct phy *phy = *(struct phy **)res; in devm_phy_consume() local 46 phy_destroy(phy); in devm_phy_consume() 51 struct phy **phy = res; in devm_phy_match() local 53 return *phy == match_data; in devm_phy_match() 57 * phy_create_lookup() - allocate and register PHY/device association 58 * @phy: the phy of the association [all …]
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D | Kconfig | 3 # PHY 6 menu "PHY Subsystem" 9 bool "PHY Core" 11 Generic PHY support. 13 This framework is designed to provide a generic interface for PHY 15 API by which phy drivers can create PHY using the phy framework and 16 phy users can obtain reference to the PHY. All the users of this 22 Generic MIPI D-PHY support. 24 Provides a number of helpers a core functions for MIPI D-PHY 28 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" [all …]
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/Linux-v5.4/drivers/scsi/libsas/ |
D | sas_phy.c | 3 * Serial Attached SCSI (SAS) Phy class 15 /* ---------- Phy events ---------- */ 20 struct asd_sas_phy *phy = ev->phy; in sas_phye_loss_of_signal() local 22 phy->error = 0; in sas_phye_loss_of_signal() 23 sas_deform_port(phy, 1); in sas_phye_loss_of_signal() 29 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_done() local 31 phy->error = 0; in sas_phye_oob_done() 37 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_error() local 38 struct sas_ha_struct *sas_ha = phy->ha; in sas_phye_oob_error() 39 struct asd_sas_port *port = phy->port; in sas_phye_oob_error() [all …]
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D | sas_port.c | 15 static bool phy_is_wideport_member(struct asd_sas_port *port, struct asd_sas_phy *phy) in phy_is_wideport_member() argument 17 struct sas_ha_struct *sas_ha = phy->ha; in phy_is_wideport_member() 19 if (memcmp(port->attached_sas_addr, phy->attached_sas_addr, in phy_is_wideport_member() 21 memcmp(port->sas_addr, phy->sas_addr, SAS_ADDR_SIZE) != 0)) in phy_is_wideport_member() 26 static void sas_resume_port(struct asd_sas_phy *phy) in sas_resume_port() argument 29 struct asd_sas_port *port = phy->port; in sas_resume_port() 30 struct sas_ha_struct *sas_ha = phy->ha; in sas_resume_port() 34 si->dft->lldd_port_formed(phy); in sas_resume_port() 60 struct ex_phy *phy = &dev->ex_dev.ex_phy[i]; in sas_resume_port() local 62 phy->phy_change_count = -1; in sas_resume_port() [all …]
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/Linux-v5.4/drivers/net/ |
D | sungem_phy.c | 3 * PHY drivers for the sungem ethernet driver. 39 /* Link modes of the BCM5400 PHY */ 51 static inline int __sungem_phy_read(struct mii_phy* phy, int id, int reg) in __sungem_phy_read() argument 53 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read() 56 static inline void __sungem_phy_write(struct mii_phy* phy, int id, int reg, int val) in __sungem_phy_write() argument 58 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write() 61 static inline int sungem_phy_read(struct mii_phy* phy, int reg) in sungem_phy_read() argument 63 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read() 66 static inline void sungem_phy_write(struct mii_phy* phy, int reg, int val) in sungem_phy_write() argument 68 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write() [all …]
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/Linux-v5.4/Documentation/driver-api/phy/ |
D | phy.rst | 2 PHY subsystem 7 This document explains the Generic PHY Framework along with the APIs provided, 13 *PHY* is the abbreviation for physical layer. It is used to connect a device 14 to the physical medium e.g., the USB controller has a PHY to provide functions 17 controllers have PHY functionality embedded into it and others use an external 18 PHY. Other peripherals that use PHY include Wireless LAN, Ethernet, 21 The intention of creating this framework is to bring the PHY drivers spread 22 all over the Linux kernel to drivers/phy to increase code re-use and for 25 This framework will be of use only to devices that use external PHY (PHY 28 Registering/Unregistering the PHY provider [all …]
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/Linux-v5.4/drivers/net/ethernet/ibm/emac/ |
D | phy.c | 3 * drivers/net/ethernet/ibm/emac/phy.c 5 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support. 30 #include "phy.h" 35 static inline int _phy_read(struct mii_phy *phy, int reg) in _phy_read() argument 37 return phy->mdio_read(phy->dev, phy->address, reg); in _phy_read() 40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument 42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write() 45 static inline int gpcs_phy_read(struct mii_phy *phy, int reg) in gpcs_phy_read() argument 47 return phy->mdio_read(phy->dev, phy->gpcs_address, reg); in gpcs_phy_read() 50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument [all …]
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/Linux-v5.4/drivers/net/phy/ |
D | phy_led_triggers.c | 4 #include <linux/phy.h> 8 static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy, in phy_speed_to_led_trigger() argument 13 for (i = 0; i < phy->phy_num_led_triggers; i++) { in phy_speed_to_led_trigger() 14 if (phy->phy_led_triggers[i].speed == speed) in phy_speed_to_led_trigger() 15 return &phy->phy_led_triggers[i]; in phy_speed_to_led_trigger() 20 static void phy_led_trigger_no_link(struct phy_device *phy) in phy_led_trigger_no_link() argument 22 if (phy->last_triggered) { in phy_led_trigger_no_link() 23 led_trigger_event(&phy->last_triggered->trigger, LED_OFF); in phy_led_trigger_no_link() 24 led_trigger_event(&phy->led_link_trigger->trigger, LED_OFF); in phy_led_trigger_no_link() 25 phy->last_triggered = NULL; in phy_led_trigger_no_link() [all …]
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/Linux-v5.4/drivers/phy/ti/ |
D | phy-omap-usb2.c | 3 * omap-usb2.c - USB PHY, talking to musb controller in OMAP. 14 #include <linux/phy/omap_usb.h> 20 #include <linux/phy/omap_control_phy.h> 21 #include <linux/phy/phy.h> 35 * this phy 36 * @comparator - the companion phy(comparator) for this phy 38 * The phy companion driver should call this API passing the phy_companion 39 * filled with set_vbus and start_srp to be used by usb phy. 41 * For use by phy companion driver 45 struct omap_usb *phy; in omap_usb2_set_comparator() local [all …]
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D | phy-ti-pipe3.c | 3 * phy-ti-pipe3 - PIPE3 PHY driver. 12 #include <linux/phy/phy.h> 19 #include <linux/phy/omap_control_phy.h> 299 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy) in ti_pipe3_get_dpll_params() argument 302 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params() 304 rate = clk_get_rate(phy->sys_clk); in ti_pipe3_get_dpll_params() 311 dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); in ti_pipe3_get_dpll_params() 316 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy); 317 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy); 319 static int ti_pipe3_power_off(struct phy *x) in ti_pipe3_power_off() [all …]
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D | phy-dm816x-usb.c | 24 #include <linux/phy/phy.h> 32 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at 42 * Finally, the phy on dm814x and am335x is different from dm816x. 45 #define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */ 46 #define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */ 57 struct usb_phy phy; member 81 static int dm816x_usb_phy_init(struct phy *x) in dm816x_usb_phy_init() 83 struct dm816x_usb_phy *phy = phy_get_drvdata(x); in dm816x_usb_phy_init() local 87 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init() 88 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init() [all …]
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/Linux-v5.4/drivers/phy/ralink/ |
D | phy-ralink-usb.c | 17 #include <linux/phy/phy.h> 56 struct phy *phy; member 61 static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg) in u2_phy_w32() argument 63 writel(val, phy->base + reg); in u2_phy_w32() 66 static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg) in u2_phy_r32() argument 68 return readl(phy->base + reg); in u2_phy_r32() 71 static void ralink_usb_phy_init(struct ralink_usb_phy *phy) in ralink_usb_phy_init() argument 73 u2_phy_r32(phy, OFS_U2_PHY_AC2); in ralink_usb_phy_init() 74 u2_phy_r32(phy, OFS_U2_PHY_ACR0); in ralink_usb_phy_init() 75 u2_phy_r32(phy, OFS_U2_PHY_DCR0); in ralink_usb_phy_init() [all …]
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/Linux-v5.4/drivers/phy/mediatek/ |
D | phy-mtk-ufs.c | 11 #include <linux/phy/phy.h> 41 static inline u32 mphy_readl(struct ufs_mtk_phy *phy, u32 reg) in mphy_readl() argument 43 return readl(phy->mmio + reg); in mphy_readl() 46 static inline void mphy_writel(struct ufs_mtk_phy *phy, u32 val, u32 reg) in mphy_writel() argument 48 writel(val, phy->mmio + reg); in mphy_writel() 51 static void mphy_set_bit(struct ufs_mtk_phy *phy, u32 reg, u32 bit) in mphy_set_bit() argument 55 val = mphy_readl(phy, reg); in mphy_set_bit() 57 mphy_writel(phy, val, reg); in mphy_set_bit() 60 static void mphy_clr_bit(struct ufs_mtk_phy *phy, u32 reg, u32 bit) in mphy_clr_bit() argument 64 val = mphy_readl(phy, reg); in mphy_clr_bit() [all …]
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/Linux-v5.4/drivers/phy/allwinner/ |
D | phy-sun9i-usb.c | 3 * Allwinner sun9i USB phy driver 7 * Based on phy-sun4i-usb.c from 18 #include <linux/phy/phy.h> 36 struct phy *phy; member 44 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable) in sun9i_usb_phy_passby() argument 52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby() 56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby() 63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby() 66 static int sun9i_usb_phy_init(struct phy *_phy) in sun9i_usb_phy_init() 68 struct sun9i_usb_phy *phy = phy_get_drvdata(_phy); in sun9i_usb_phy_init() local [all …]
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/Linux-v5.4/Documentation/devicetree/bindings/phy/ |
D | samsung-phy.txt | 6 - "samsung,s5pv210-mipi-video-phy" 7 - "samsung,exynos5420-mipi-video-phy" 8 - "samsung,exynos5433-mipi-video-phy" 9 - #phy-cells : from the generic phy bindings, must be 1; 14 In case of exynos5433 compatible PHY: 20 For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in 21 the PHY specifier identifies the PHY and its meaning is as follows: 26 "samsung,exynos5420-mipi-video-phy" and "samsung,exynos5433-mipi-video-phy" 27 supports additional fifth PHY: 30 Samsung EXYNOS SoC series Display Port PHY [all …]
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D | qcom-qmp-phy.txt | 1 Qualcomm QMP PHY controller 4 QMP phy controller supports physical layer functionality for a number of 9 "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, 11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, 12 "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, 13 "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, 14 "qcom,msm8998-qmp-pcie-phy" for PCIe QMP phy on msm8998, 15 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, 16 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845, [all …]
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/Linux-v5.4/drivers/net/ethernet/intel/igb/ |
D | e1000_phy.c | 31 * igb_check_reset_block - Check if PHY reset is blocked 34 * Read the PHY management control register and check whether a PHY reset 48 * igb_get_phy_id - Retrieve the PHY ID and revision 51 * Reads the PHY registers and stores the PHY ID and possibly the PHY 56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id() local 60 /* ensure PHY page selection to fix misconfigured i210 */ in igb_get_phy_id() 62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id() 64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id() 68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id() 70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id() [all …]
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/Linux-v5.4/drivers/gpu/drm/i915/display/ |
D | intel_combo_phy.c | 41 * CNL has just one set of registers, while gen11 has a set for each combo PHY. 42 * The CNL registers are equivalent to the gen11 PHY A registers, that's why we 46 cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in cnl_get_procmon_ref_values() argument 51 val = I915_READ(ICL_PORT_COMP_DW3(phy)); in cnl_get_procmon_ref_values() 77 enum phy phy) in cnl_set_procmon_ref_values() argument 82 procmon = cnl_get_procmon_ref_values(dev_priv, phy); in cnl_set_procmon_ref_values() 84 val = I915_READ(ICL_PORT_COMP_DW1(phy)); in cnl_set_procmon_ref_values() 87 I915_WRITE(ICL_PORT_COMP_DW1(phy), val); in cnl_set_procmon_ref_values() 89 I915_WRITE(ICL_PORT_COMP_DW9(phy), procmon->dw9); in cnl_set_procmon_ref_values() 90 I915_WRITE(ICL_PORT_COMP_DW10(phy), procmon->dw10); in cnl_set_procmon_ref_values() [all …]
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/Linux-v5.4/drivers/nfc/pn544/ |
D | i2c.c | 188 static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy) in pn544_hci_i2c_platform_init() argument 194 nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n"); in pn544_hci_i2c_platform_init() 197 gpiod_set_value_cansleep(phy->gpiod_fw, 0); in pn544_hci_i2c_platform_init() 200 phy->en_polarity = polarity; in pn544_hci_i2c_platform_init() 204 gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity); in pn544_hci_i2c_platform_init() 208 gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity); in pn544_hci_i2c_platform_init() 212 dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n"); in pn544_hci_i2c_platform_init() 213 ret = i2c_master_send(phy->i2c_dev, rset_cmd, count); in pn544_hci_i2c_platform_init() 215 nfc_info(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init() 223 nfc_err(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init() [all …]
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/Linux-v5.4/drivers/net/ethernet/chelsio/cxgb3/ |
D | ael1002.c | 62 /* PHY module I2C device address */ 68 /* PHY transceiver type */ 84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument 90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs() 93 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs() 100 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument 103 phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon() 106 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon() 111 * Read an 8-bit word from a device attached to the PHY's i2c bus. 113 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) in ael_i2c_rd() argument [all …]
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/Linux-v5.4/drivers/nfc/s3fwrn5/ |
D | i2c.c | 40 struct s3fwrn5_i2c_phy *phy = phy_id; in s3fwrn5_i2c_set_wake() local 42 mutex_lock(&phy->mutex); in s3fwrn5_i2c_set_wake() 43 gpio_set_value(phy->gpio_fw_wake, wake); in s3fwrn5_i2c_set_wake() 45 mutex_unlock(&phy->mutex); in s3fwrn5_i2c_set_wake() 50 struct s3fwrn5_i2c_phy *phy = phy_id; in s3fwrn5_i2c_set_mode() local 52 mutex_lock(&phy->mutex); in s3fwrn5_i2c_set_mode() 54 if (phy->mode == mode) in s3fwrn5_i2c_set_mode() 57 phy->mode = mode; in s3fwrn5_i2c_set_mode() 59 gpio_set_value(phy->gpio_en, 1); in s3fwrn5_i2c_set_mode() 60 gpio_set_value(phy->gpio_fw_wake, 0); in s3fwrn5_i2c_set_mode() [all …]
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/Linux-v5.4/drivers/gpu/drm/sun4i/ |
D | sun8i_hdmi_phy.c | 134 struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_config_a83t() argument 137 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_hdmi_phy_config_a83t() 196 struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_config_h3() argument 264 SUN8I_HDMI_PHY_ANA_CFG2_REG_RESDI(phy->rcal); in sun8i_hdmi_phy_config_h3() 274 SUN8I_HDMI_PHY_ANA_CFG2_REG_RESDI(phy->rcal); in sun8i_hdmi_phy_config_h3() 300 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, in sun8i_hdmi_phy_config_h3() 304 * NOTE: We have to be careful not to overwrite PHY parent in sun8i_hdmi_phy_config_h3() 307 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, in sun8i_hdmi_phy_config_h3() 310 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, in sun8i_hdmi_phy_config_h3() 314 regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG3_REG, in sun8i_hdmi_phy_config_h3() [all …]
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/Linux-v5.4/drivers/gpu/drm/msm/hdmi/ |
D | hdmi_phy.c | 10 static int msm_hdmi_phy_resource_init(struct hdmi_phy *phy) in msm_hdmi_phy_resource_init() argument 12 struct hdmi_phy_cfg *cfg = phy->cfg; in msm_hdmi_phy_resource_init() 13 struct device *dev = &phy->pdev->dev; in msm_hdmi_phy_resource_init() 16 phy->regs = devm_kcalloc(dev, cfg->num_regs, sizeof(phy->regs[0]), in msm_hdmi_phy_resource_init() 18 if (!phy->regs) in msm_hdmi_phy_resource_init() 21 phy->clks = devm_kcalloc(dev, cfg->num_clks, sizeof(phy->clks[0]), in msm_hdmi_phy_resource_init() 23 if (!phy->clks) in msm_hdmi_phy_resource_init() 32 DRM_DEV_ERROR(dev, "failed to get phy regulator: %s (%d)\n", in msm_hdmi_phy_resource_init() 37 phy->regs[i] = reg; in msm_hdmi_phy_resource_init() 43 clk = msm_clk_get(phy->pdev, cfg->clk_names[i]); in msm_hdmi_phy_resource_init() [all …]
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/Linux-v5.4/drivers/staging/mt7621-pci-phy/ |
D | pci-mt7621-phy.c | 3 * Mediatek MT7621 PCI PHY Driver 7 #include <dt-bindings/phy/phy.h> 12 #include <linux/phy/phy.h> 81 * struct mt7621_pci_phy_instance - Mt7621 Pcie PHY device 82 * @phy: pointer to the kernel PHY device 84 * @index: internal ID to identify the Mt7621 PCIe PHY 87 struct phy *phy; member 93 * struct mt7621_pci_phy - Mt7621 Pcie PHY core 96 * @phys: pointer to Mt7621 PHY device 97 * @nphys: number of PHY devices for this core [all …]
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