Searched full:pl5 (Results 1 – 17 of 17) sorted by relevance
68 gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */88 pins = "PL5";
97 interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
76 gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
104 gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
68 gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
136 interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>; /* PL5 */
387 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
475 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
55 device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
100 enable-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* LCD-RST: PL5 */
363 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
377 host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
494 host-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
772 PINMUX_GPIO(PL5),
17 v1.1: (in 1.2.13pl5)
447 PINCTRL_PIN(TEGRA_PIN_VI_D7_PL5, "VI_D7 PL5"),
385 PINCTRL_PIN(TEGRA_PIN_VI_D7_PL5, "VI_D7 PL5"),
