| /Linux-v5.4/drivers/irqchip/ |
| D | irq-mvebu-pic.c | 35 static void mvebu_pic_reset(struct mvebu_pic *pic) in mvebu_pic_reset() argument
38 writel(0, pic->base + PIC_MASK); in mvebu_pic_reset()
39 writel(PIC_MAX_IRQ_MASK, pic->base + PIC_CAUSE); in mvebu_pic_reset()
44 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_eoi_irq() local
46 writel(1 << d->hwirq, pic->base + PIC_CAUSE); in mvebu_pic_eoi_irq()
51 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_mask_irq() local
54 reg = readl(pic->base + PIC_MASK); in mvebu_pic_mask_irq()
56 writel(reg, pic->base + PIC_MASK); in mvebu_pic_mask_irq()
61 struct mvebu_pic *pic = irq_data_get_irq_chip_data(d); in mvebu_pic_unmask_irq() local
64 reg = readl(pic->base + PIC_MASK); in mvebu_pic_unmask_irq()
[all …]
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| D | irq-or1k-pic.c | 13 /* OR1K PIC implementation */
48 * There are two oddities with the OR1200 PIC implementation:
66 .name = "or1k-PIC-level",
77 .name = "or1k-PIC-edge",
89 .name = "or1200-PIC",
124 struct or1k_pic_dev *pic = d->host_data; in or1k_map() local
126 irq_set_chip_and_handler(irq, &pic->chip, pic->handle); in or1k_map()
127 irq_set_status_flags(irq, pic->flags); in or1k_map()
138 * This sets up the IRQ domain for the PIC built in to the OpenRISC
143 struct or1k_pic_dev *pic) in or1k_pic_init() argument
[all …]
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| /Linux-v5.4/arch/c6x/platforms/ |
| D | megamod-pic.c | 16 #include <asm/megamod-pic.h>
59 struct megamod_pic *pic; member
67 struct megamod_pic *pic = irq_data_get_irq_chip_data(data); in mask_megamod() local
69 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in mask_megamod()
71 raw_spin_lock(&pic->lock); in mask_megamod()
73 raw_spin_unlock(&pic->lock); in mask_megamod()
78 struct megamod_pic *pic = irq_data_get_irq_chip_data(data); in unmask_megamod() local
80 u32 __iomem *evtmask = &pic->regs->evtmask[src / 32]; in unmask_megamod()
82 raw_spin_lock(&pic->lock); in unmask_megamod()
84 raw_spin_unlock(&pic->lock); in unmask_megamod()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/ |
| D | open-pic.txt | 1 * Open PIC Binding
4 representation of an Open PIC compliant interrupt controller. This binding is
5 based on the binding defined for Open PIC in [1] and is a superset of that
13 - compatible: Specifies the compatibility list for the PIC. The type
14 shall be <string> and the value shall include "open-pic".
17 PIC's addressable register space. The type shall be <prop-encoded-array>.
20 as an Open PIC. No property value shall be defined.
31 - pic-no-reset: The presence of this property indicates that the PIC
55 * An Open PIC interrupt controller
57 mpic: pic@40000 {
[all …]
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| D | ti,c64x+megamod-pic.txt | 13 - compatible: Should be "ti,c64x+core-pic";
26 compatible = "ti,c64x+core-pic";
33 The megamodule PIC consists of four interrupt mupliplexers each of which
35 may be cascaded into the core interrupt controller. The megamodule PIC
45 - compatible: "ti,c64x+megamod-pic"
55 - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
68 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
75 compatible = "ti,c64x+megamod-pic";
89 compatible = "ti,c64x+megamod-pic";
95 ti,c64x+megamod-pic-mux = < 0 0 0 0
|
| D | opencores,or1k-pic.txt | 5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
7 edge triggered interrupt lines or "opencores,or1200-pic" for machines
10 "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
20 compatible = "opencores,or1k-pic-level";
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| D | marvell,armada-8k-pic.txt | 1 Marvell Armada 7K/8K PIC Interrupt controller
4 This is the Device Tree binding for the PIC, a secondary interrupt
9 - compatible: should be "marvell,armada-8k-pic"
13 - reg: the register area for the PIC interrupt controller
19 pic: interrupt-controller@3f0100 {
20 compatible = "marvell,armada-8k-pic";
|
| /Linux-v5.4/arch/powerpc/platforms/cell/ |
| D | spider-pic.c | 63 static void __iomem *spider_get_irq_config(struct spider_pic *pic, in spider_get_irq_config() argument
66 return pic->regs + TIR_CFGA + 8 * src; in spider_get_irq_config()
71 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_unmask_irq() local
72 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); in spider_unmask_irq()
79 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_mask_irq() local
80 void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); in spider_mask_irq()
87 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_ack_irq() local
100 out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); in spider_ack_irq()
106 struct spider_pic *pic = spider_irq_data_to_pic(d); in spider_set_irq_type() local
108 void __iomem *cfg = spider_get_irq_config(pic, hw); in spider_set_irq_type()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 39 interrupt-parent = <&pic>;
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
57 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
[all …]
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | integratorap.dts | 111 interrupt-parent = <&pic>;
152 pic: pic@14000000 { label
163 interrupt-parent = <&pic>;
180 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
181 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
182 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
183 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
185 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
186 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
187 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
[all …]
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| /Linux-v5.4/arch/powerpc/boot/dts/ |
| D | mpc8272ads.dts | 69 compatible = "fsl,mpc8272ads-pci-pic",
70 "fsl,pq2ads-pci-pic";
74 interrupt-parent = <&PIC>;
108 interrupt-parent = <&PIC>;
156 interrupt-parent = <&PIC>;
167 interrupt-parent = <&PIC>;
176 interrupt-parent = <&PIC>;
191 interrupt-parent = <&PIC>;
197 interrupt-parent = <&PIC>;
210 interrupt-parent = <&PIC>;
[all …]
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| D | tqm8xx.dts | 39 interrupt-parent = <&PIC>;
73 interrupt-parent = <&PIC>;
85 interrupt-parent = <&PIC>;
115 interrupt-parent = <&PIC>;
120 PIC: pic@0 { label
124 compatible = "fsl,mpc860-pic", "fsl,pq1-pic";
156 CPM_PIC: pic@930 {
161 interrupt-parent = <&PIC>;
163 compatible = "fsl,mpc860-cpm-pic",
164 "fsl,cpm1-pic";
|
| D | pq2fads.dts | 68 PCI_PIC: pic@8,0 {
72 compatible = "fsl,pq2ads-pci-pic";
73 interrupt-parent = <&PIC>;
106 interrupt-parent = <&PIC>;
155 interrupt-parent = <&PIC>;
166 interrupt-parent = <&PIC>;
177 interrupt-parent = <&PIC>;
189 interrupt-parent = <&PIC>;
207 interrupt-parent = <&PIC>;
213 interrupt-parent = <&PIC>;
[all …]
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| D | ep8248e.dts | 72 interrupt-parent = <&PIC>;
77 interrupt-parent = <&PIC>;
135 interrupt-parent = <&PIC>;
148 interrupt-parent = <&PIC>;
161 interrupt-parent = <&PIC>;
174 interrupt-parent = <&PIC>;
186 interrupt-parent = <&PIC>;
192 PIC: interrupt-controller@10c00 { label
196 compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
|
| D | mpc866ads.dts | 32 interrupt-parent = <&PIC>;
83 interrupt-parent = <&PIC>;
88 PIC: pic@0 { label
92 compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
124 CPM_PIC: pic@930 {
129 interrupt-parent = <&PIC>;
131 compatible = "fsl,mpc866-cpm-pic",
132 "fsl,cpm1-pic";
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| D | mpc885ads.dts | 32 interrupt-parent = <&PIC>;
103 interrupt-parent = <&PIC>;
115 interrupt-parent = <&PIC>;
120 PIC: interrupt-controller@0 { label
124 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
134 interrupt-parent = <&PIC>;
171 interrupt-parent = <&PIC>;
173 compatible = "fsl,mpc885-cpm-pic",
174 "fsl,cpm1-pic";
228 interrupt-parent = <&PIC>;
|
| /Linux-v5.4/arch/xtensa/boot/dts/ |
| D | virt.dts | 8 interrupt-parent = <&pic>;
37 pic: pic { label
38 compatible = "cdns,xtensa-pic";
64 0x0000 0x0 0x0 0x1 &pic 0x0 0x1
65 0x0800 0x0 0x0 0x1 &pic 0x1 0x1
66 0x1000 0x0 0x0 0x1 &pic 0x2 0x1
67 0x1800 0x0 0x0 0x1 &pic 0x3 0x1
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| /Linux-v5.4/arch/powerpc/platforms/52xx/ |
| D | lite5200_pm.c | 13 static struct mpc52xx_intr __iomem *pic; variable
79 pic = mbar + 0x500; in lite5200_pm_prepare()
101 _memcpy_fromio(&spic, pic, sizeof(*pic)); in lite5200_save_regs()
189 /* PIC */ in lite5200_restore_regs()
190 out_be32(&pic->per_pri1, spic.per_pri1); in lite5200_restore_regs()
191 out_be32(&pic->per_pri2, spic.per_pri2); in lite5200_restore_regs()
192 out_be32(&pic->per_pri3, spic.per_pri3); in lite5200_restore_regs()
194 out_be32(&pic->main_pri1, spic.main_pri1); in lite5200_restore_regs()
195 out_be32(&pic->main_pri2, spic.main_pri2); in lite5200_restore_regs()
197 out_be32(&pic->enc_status, spic.enc_status); in lite5200_restore_regs()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/ |
| D | pic.txt | 4 - fsl,cpm1-pic
6 - fsl,pq1-pic
7 - fsl,cpm2-pic
17 compatible = "mpc8272-pic", "fsl,cpm2-pic";
|
| /Linux-v5.4/arch/sparc/include/uapi/asm/ |
| D | perfctr.h | 26 * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer
38 /* Add current D0 and D1 PIC values into user pointers given
39 * in PERFCTR_ON operation. The PIC is cleared before returning.
43 /* Clear the PIC register. */
47 * in ARG0. The PIC is also cleared after the new PCR value is
62 /* Pic.S0 Selection Bit Field Encoding, Ultra-I/II */
76 /* Pic.S0 Selection Bit Field Encoding, Ultra-III */
107 /* Pic.S1 Selection Bit Field Encoding, Ultra-I/II */
121 /* Pic.S1 Selection Bit Field Encoding, Ultra-III */
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| /Linux-v5.4/arch/alpha/kernel/ |
| D | irq_i8259.c | 76 .name = "XT-PIC",
128 * Generate a PCI interrupt acknowledge cycle. The PIC will in isa_device_interrupt()
143 unsigned long pic; in isa_no_iack_sc_device_interrupt() local
158 pic = inb(0x20) | (inb(0xA0) << 8); /* read isr */ in isa_no_iack_sc_device_interrupt()
159 pic &= 0xFFFB; /* mask out cascade & hibits */ in isa_no_iack_sc_device_interrupt()
161 while (pic) { in isa_no_iack_sc_device_interrupt()
162 int j = ffz(~pic); in isa_no_iack_sc_device_interrupt()
163 pic &= pic - 1; in isa_no_iack_sc_device_interrupt()
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| /Linux-v5.4/arch/mips/boot/dts/netlogic/ |
| D | xlp_fvp.dts | 27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
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| D | xlp_svp.dts | 27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
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| D | xlp_evp.dts | 27 interrupt-parent = <&pic>;
37 interrupt-parent = <&pic>;
48 interrupt-parent = <&pic>;
59 interrupt-parent = <&pic>;
72 pic: pic@4000 { label
73 compatible = "netlogic,xlp-pic";
122 interrupt-parent = <&pic>;
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| /Linux-v5.4/arch/sparc/include/asm/ |
| D | pcr.h | 19 #define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
23 #define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
24 #define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
36 #define PCR_N4_OV 0x00000001 /* PIC overflow */
45 #define PCR_N4_PICNPT 0x00010000 /* PIC non-privileged trap */
46 #define PCR_N4_PICNHT 0x00020000 /* PIC non-hypervisor trap */
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