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/Linux-v6.1/drivers/scsi/mpt3sas/
Dmpt3sas_transport.c5 * Copyright (C) 2012-2014 LSI Corporation
6 * Copyright (C) 2013-2014 Avago Technologies
7 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
64 * _transport_get_port_id_by_sas_phy - get zone's port id that Phy belong to
65 * @phy: sas_phy object
70 _transport_get_port_id_by_sas_phy(struct sas_phy *phy) in _transport_get_port_id_by_sas_phy() argument
73 struct hba_port *port = phy->hostdata; in _transport_get_port_id_by_sas_phy()
76 port_id = port->port_id; in _transport_get_port_id_by_sas_phy()
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/Linux-v6.1/drivers/phy/ti/
Dphy-ti-pipe3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phy-ti-pipe3 - PIPE3 PHY driver.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/phy/phy.h>
19 #include <linux/phy/omap_control_phy.h>
215 /* DRA75x TRM Table 26-17 Preferred USB3_PHY_RX SCP Register Settings */
241 /* DRA75x TRM Table 26-9 Preferred SATA_PHY_RX SCP Register Settings */
266 /* DRA75x TRM Table 26-62 Preferred PCIe_PHY_RX SCP Register Settings */
299 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy) in ti_pipe3_get_dpll_params() argument
302 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params()
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Dphy-dm816x-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/phy/phy.h>
23 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
25 * kernel is writing to those so it's possible that later revisions
29 * according to the TRM. It's possible that USBPHY_CTRL is more generic,
33 * Finally, the phy on dm814x and am335x is different from dm816x.
36 #define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */
37 #define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */
48 struct usb_phy phy; member
55 otg->host = host; in dm816x_usb_phy_set_host()
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/Linux-v6.1/Documentation/networking/
Dphy.rst2 PHY Abstraction Layer
10 PHY. The PHY concerns itself with negotiating link parameters with the link
17 the PHY management code with the network driver. This has resulted in large
23 accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
26 #. Increase code-reuse
27 #. Increase overall code-maintainability
30 Basically, this layer is meant to provide an interface to PHY devices which
37 Most network devices are connected to a PHY by means of a management bus.
47 mii_id is the address on the bus for the PHY, and regnum is the register
57 mdiobus_register. Similarly, there's a remove function to undo all of
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/Linux-v6.1/drivers/scsi/mpi3mr/
Dmpi3mr_transport.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2017-2022 Broadcom Inc.
6 * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com)
16 * mpi3mr_post_transport_req - Issue transport requests and wait
34 * Return: 0 on success, non-zero on failure.
42 mutex_lock(&mrioc->transport_cmds.mutex); in mpi3mr_post_transport_req()
43 if (mrioc->transport_cmds.state & MPI3MR_CMD_PENDING) { in mpi3mr_post_transport_req()
44 retval = -1; in mpi3mr_post_transport_req()
46 mutex_unlock(&mrioc->transport_cmds.mutex); in mpi3mr_post_transport_req()
49 mrioc->transport_cmds.state = MPI3MR_CMD_PENDING; in mpi3mr_post_transport_req()
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/Linux-v6.1/drivers/dma/
Dpxa_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
22 #include <linux/dma/pxa-dma.h>
25 #include "virt-dma.h"
36 #define PXA_DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
38 #define PXA_DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
39 #define PXA_DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
64 #define PXA_DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
71 #define PXA_DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
74 #define PDMA_MAX_DESC_BYTES (PXA_DCMD_LENGTH & ~((1 << PDMA_ALIGNMENT) - 1))
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Ds3c24xx-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * based on amba-pl08x.c
10 * Copyright (c) 2010 ST-Ericsson SA
16 * that can be routed to any of the 4 to 8 hardware-channels.
24 * - bursts
30 #include <linux/dma-mapping.h>
36 #include <linux/platform_data/dma-s3c24xx.h>
39 #include "virt-dma.h"
104 * SDI is valid on channels 0, 2 and 3 - with varying hw request sources.
116 * struct soc_data - vendor-specific config parameters for individual SoCs
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/Linux-v6.1/drivers/net/fddi/skfp/
Dpcmplc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
67 #define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG)
68 #define ACTIONS_DONE() (mib->fddiPORTPCMState &= ~AFLAG)
109 * PCL-S control register
110 * this register in the PLC-S controls the scrambling parameters
121 * PCL-S control register
122 * this register in the PLC-S controls the scrambling parameters
152 #define PLC_MS(m) ((int)((0x10000L-(m*100000L/2048))))
191 static void pcm_fsm(struct s_smc *smc, struct s_phy *phy, int cmd);
192 static void pc_rcode_actions(struct s_smc *smc, int bit, struct s_phy *phy);
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/Linux-v6.1/drivers/scsi/aic94xx/
Daic94xx_scb.c1 // SPDX-License-Identifier: GPL-2.0-only
19 /* ---------- EMPTY SCB ---------- */
36 static void get_lrate_mode(struct asd_phy *phy, u8 oob_mode) in get_lrate_mode() argument
38 struct sas_phy *sas_phy = phy->sas_phy.phy; in get_lrate_mode()
43 phy->sas_phy.linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
44 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_6_0_GBPS; in get_lrate_mode()
47 phy->sas_phy.linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
48 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_3_0_GBPS; in get_lrate_mode()
51 phy->sas_phy.linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
52 phy->sas_phy.phy->negotiated_linkrate = SAS_LINK_RATE_1_5_GBPS; in get_lrate_mode()
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/Linux-v6.1/net/mac802154/
Dmain.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2007-2012 Siemens AG
28 while ((skb = skb_dequeue(&local->skb_queue))) { in ieee802154_tasklet_handler()
29 switch (skb->pkt_type) { in ieee802154_tasklet_handler()
31 /* Clear skb->pkt_type in order to not confuse kernel in ieee802154_tasklet_handler()
34 skb->pkt_type = 0; in ieee802154_tasklet_handler()
39 skb->pkt_type); in ieee802154_tasklet_handler()
49 struct wpan_phy *phy; in ieee802154_alloc_hw() local
53 if (WARN_ON(!ops || !(ops->xmit_async || ops->xmit_sync) || !ops->ed || in ieee802154_alloc_hw()
54 !ops->start || !ops->stop || !ops->set_channel)) in ieee802154_alloc_hw()
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/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_combo_phy.c1 // SPDX-License-Identifier: MIT
16 for ((__phy) = I915_MAX_PHYS; (__phy)-- > PHY_A;) \
32 .name = "0.85V dot0 (low-voltage)",
54 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in icl_get_procmon_ref_values() argument
59 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy)); in icl_get_procmon_ref_values()
85 enum phy phy) in icl_set_procmon_ref_values() argument
90 procmon = icl_get_procmon_ref_values(dev_priv, phy); in icl_set_procmon_ref_values()
92 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW1(phy)); in icl_set_procmon_ref_values()
94 val |= procmon->dw1; in icl_set_procmon_ref_values()
95 intel_de_write(dev_priv, ICL_PORT_COMP_DW1(phy), val); in icl_set_procmon_ref_values()
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/Linux-v6.1/drivers/phy/samsung/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Samsung platforms
6 tristate "Exynos SoC series Display Port PHY driver"
12 Support for Display Port PHY found on Samsung Exynos SoCs.
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
21 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
25 bool "Exynos PCIe PHY driver"
29 Enable PCIe PHY support for Exynos SoC series.
30 This driver provides PHY interface for Exynos PCIe controller.
33 tristate "Exynos SoC series UFS PHY driver"
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/Linux-v6.1/drivers/net/wireless/mediatek/mt76/mt7915/
Ddebugfs.c1 // SPDX-License-Identifier: ISC
29 dev->ibf = !!val; in mt7915_implicit_txbf_set()
39 *val = dev->ibf; in mt7915_implicit_txbf_get()
52 struct mt7915_phy *phy = file->private_data; in mt7915_fw_ser_set() local
53 struct mt7915_dev *dev = phy->dev; in mt7915_fw_ser_set()
54 bool ext_phy = phy != &dev->phy; in mt7915_fw_ser_set()
60 return -EINVAL; in mt7915_fw_ser_set()
63 return -EFAULT; in mt7915_fw_ser_set()
65 if (count && buf[count - 1] == '\n') in mt7915_fw_ser_set()
66 buf[count - 1] = '\0'; in mt7915_fw_ser_set()
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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dti,phy-gmii-sel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: CPSW Port's Interface Mode Selection PHY Tree Bindings
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 The interface mode is selected by configuring the MII mode selection register(s)
17 (GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and
20 +--------------+
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/Linux-v6.1/net/ieee802154/
Dnl-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
25 #include "rdev-ops.h"
29 u32 seq, int flags, struct wpan_phy *phy) in ieee802154_nl_fill_phy() argument
35 pr_debug("%s\n", __func__); in ieee802154_nl_fill_phy()
38 return -EMSGSIZE; in ieee802154_nl_fill_phy()
46 if (nla_put_string(msg, IEEE802154_ATTR_PHY_NAME, wpan_phy_name(phy)) || in ieee802154_nl_fill_phy()
47 nla_put_u8(msg, IEEE802154_ATTR_PAGE, phy->current_page) || in ieee802154_nl_fill_phy()
48 nla_put_u8(msg, IEEE802154_ATTR_CHANNEL, phy->current_channel)) in ieee802154_nl_fill_phy()
51 if (phy->supported.channels[i]) in ieee802154_nl_fill_phy()
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/Linux-v6.1/drivers/phy/hisilicon/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Hisilicon platforms
6 tristate "hi6220 USB PHY support"
12 Enable this to support the HISILICON HI6220 USB PHY.
17 tristate "hi3660 USB PHY support"
22 Enable this to support the HISILICON HI3660 USB PHY.
27 tristate "hi3670 USB PHY support"
32 Enable this to support the HISILICON HI3670 USB PHY.
37 tristate "hi3670 PCIe PHY support"
42 Enable this to support the HiSilicon hi3670 PCIe PHY.
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/Linux-v6.1/include/linux/phy/
Dulpi_phy.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/phy/phy.h>
5 * Helper that registers PHY for a ULPI device and adds a lookup for binding it
6 * and it's controller, which is always the parent.
8 static inline struct phy
11 struct phy *phy; in ulpi_phy_create() local
14 phy = phy_create(&ulpi->dev, NULL, ops); in ulpi_phy_create()
15 if (IS_ERR(phy)) in ulpi_phy_create()
16 return phy; in ulpi_phy_create()
18 ret = phy_create_lookup(phy, "usb2-phy", dev_name(ulpi->dev.parent)); in ulpi_phy_create()
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/Linux-v6.1/net/caif/
Dcfcnfg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson AB 2010
7 #define pr_fmt(fmt) KBUILD_MODNAME ":%s(): " fmt, __func__
83 this->mux = cfmuxl_create(); in cfcnfg_create()
84 if (!this->mux) in cfcnfg_create()
86 this->ctrl = cfctrl_create(); in cfcnfg_create()
87 if (!this->ctrl) in cfcnfg_create()
90 resp = cfctrl_get_respfuncs(this->ctrl); in cfcnfg_create()
91 resp->enum_rsp = cfctrl_enum_resp; in cfcnfg_create()
92 resp->linkerror_ind = cfctrl_resp_func; in cfcnfg_create()
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/Linux-v6.1/drivers/net/ethernet/chelsio/cxgb/
Dsubr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
40 * t1_wait_op_done - wait until an operation is completed
43 * @mask: a single-bit field within @reg that indicates completion
56 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
60 if (--attempts == 0) in t1_wait_op_done()
76 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
77 writel(value, adapter->regs + A_TPI_WR_DATA); in __t1_tpi_write()
78 writel(F_TPIWR, adapter->regs + A_TPI_CSR); in __t1_tpi_write()
83 pr_alert("%s: TPI write to 0x%x failed\n", in __t1_tpi_write()
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/Linux-v6.1/drivers/scsi/isci/
Dport.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
75 int i = iport->physical_port_index; in sciport_to_dev()
82 table = iport - i; in sciport_to_dev()
85 return &ihost->pdev->dev; in sciport_to_dev()
92 proto->all = 0; in sci_port_get_protocols()
94 struct isci_phy *iphy = iport->phy_table[index]; in sci_port_get_protocols()
109 if (iport->phy_table[index]) in sci_port_get_phys()
116 * sci_port_get_properties() - This method simply returns the properties
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/Linux-v6.1/drivers/scsi/hisi_sas/
Dhisi_sas_main.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
26 switch (fis->command) { in hisi_sas_get_ata_protocol()
79 switch (fis->features) { in hisi_sas_get_ata_protocol()
105 struct task_status_struct *ts = &task->task_status; in hisi_sas_sata_done()
106 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf; in hisi_sas_sata_done()
109 u8 *iu = &status_buf->iu[0]; in hisi_sas_sata_done()
112 resp->frame_len = sizeof(struct dev_to_host_fis); in hisi_sas_sata_done()
113 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis)); in hisi_sas_sata_done()
115 ts->buf_valid_size = sizeof(*resp); in hisi_sas_sata_done()
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/Linux-v6.1/drivers/phy/qualcomm/
Dphy-qcom-pcie2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
11 #include <linux/phy/phy.h>
16 #include <dt-bindings/phy/phy.h>
50 static int qcom_pcie2_phy_init(struct phy *phy) in qcom_pcie2_phy_init() argument
52 struct qcom_phy *qphy = phy_get_drvdata(phy); in qcom_pcie2_phy_init()
55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init()
57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init()
61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init()
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/Linux-v6.1/drivers/gpu/drm/msm/hdmi/
Dhdmi_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
10 static int msm_hdmi_phy_resource_init(struct hdmi_phy *phy) in msm_hdmi_phy_resource_init() argument
12 struct hdmi_phy_cfg *cfg = phy->cfg; in msm_hdmi_phy_resource_init()
13 struct device *dev = &phy->pdev->dev; in msm_hdmi_phy_resource_init()
16 phy->regs = devm_kcalloc(dev, cfg->num_regs, sizeof(phy->regs[0]), in msm_hdmi_phy_resource_init()
18 if (!phy->regs) in msm_hdmi_phy_resource_init()
19 return -ENOMEM; in msm_hdmi_phy_resource_init()
21 phy->clks = devm_kcalloc(dev, cfg->num_clks, sizeof(phy->clks[0]), in msm_hdmi_phy_resource_init()
23 if (!phy->clks) in msm_hdmi_phy_resource_init()
24 return -ENOMEM; in msm_hdmi_phy_resource_init()
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/Linux-v6.1/drivers/usb/phy/
Dphy-isp1301-omap.c1 // SPDX-License-Identifier: GPL-2.0+
3 * isp1301_omap - ISP 1301 USB transceiver, talking to OMAP OTG controller
24 #include <asm/mach-types.h>
26 #include <linux/soc/ti/omap1-mux.h>
27 #include <linux/soc/ti/omap1-usb.h>
28 #include <linux/soc/ti/omap1-io.h>
40 struct usb_phy phy; member
78 /*-------------------------------------------------------------------------*/
80 /* board-specific PM hooks */
111 * unless the OTG port is used only in B-peripheral mode. in enable_vbus_draw()
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/Linux-v6.1/drivers/phy/
Dphy-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * phy-core.c -- Generic Phy framework.
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
17 #include <linux/phy/phy.h>
30 struct phy *phy = *(struct phy **)res; in devm_phy_release() local
32 phy_put(dev, phy); in devm_phy_release()
44 struct phy *phy = *(struct phy **)res; in devm_phy_consume() local
46 phy_destroy(phy); in devm_phy_consume()
51 struct phy **phy = res; in devm_phy_match() local
53 return *phy == match_data; in devm_phy_match()
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