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/Linux-v5.10/arch/arm/boot/dts/
Dimx7ulp.dtsi298 pcc3: clock-controller@40b30000 { label
299 compatible = "fsl,imx7ulp-pcc3";
331 clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
333 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
343 clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
345 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
355 clocks = <&pcc3 IMX7ULP_CLK_LPUART6>;
357 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPUART6>;
367 clocks = <&pcc3 IMX7ULP_CLK_LPUART7>;
369 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPUART7>;
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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dimx7ulp-pcc-clock.yaml24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
41 - fsl,imx7ulp-pcc3
Dimx7ulp-scg-clock.yaml24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
/Linux-v5.10/include/dt-bindings/clock/
Dimx7ulp-clock.h94 /* PCC3 */
/Linux-v5.10/drivers/clk/imx/
Dclk-imx7ulp.c218 /* PCC3 */ in imx7ulp_clk_pcc3_init()
255 CLK_OF_DECLARE(imx7ulp_clk_pcc3, "fsl,imx7ulp-pcc3", imx7ulp_clk_pcc3_init);
/Linux-v5.10/drivers/pinctrl/tegra/
Dpinctrl-tegra210.c334 PINCTRL_PIN(TEGRA_PIN_SPDIF_IN_PCC3, "SPDIF_IN PCC3"),
Dpinctrl-tegra30.c519 PINCTRL_PIN(TEGRA_PIN_SDMMC4_RST_N_PCC3, "SDMMC4_RST_N PCC3"),