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/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dxilinx-nwl-pcie.txt1 * Xilinx NWL PCIe Root Port Bridge DT description
4 - compatible: Should contain "xlnx,nwl-pcie-2.11"
16 - interrupts: Should contain NWL PCIe interrupt
43 compatible = "xlnx,nwl-pcie-2.11";
/Linux-v5.10/Documentation/devicetree/bindings/display/bridge/
Dnwl-dsi.yaml4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
22 const: fsl,imx8mq-nwl-dsi
177 compatible = "fsl,imx8mq-nwl-dsi";
/Linux-v5.10/drivers/gpu/drm/bridge/
Dnwl-dsi.c3 * i.MX8 NWL MIPI DSI host driver
32 #include "nwl-dsi.h"
34 #define DRV_NAME "nwl-dsi"
36 /* i.MX8 NWL quirks */
82 * The DSI host controller needs this reset sequence according to NWL:
151 "Failed to write NWL DSI reg 0x%x: %d\n", reg, in nwl_dsi_write()
167 DRM_DEV_ERROR(dsi->dev, "Failed to read NWL DSI reg 0x%x: %d\n", in nwl_dsi_read()
791 * dphy and nwl dsi host in nwl_dsi_get_dphy_params()
810 /* At least LCDIF + NWL needs active high sync */ in nwl_dsi_bridge_mode_fixup()
1031 DRM_DEV_ERROR(dsi->dev, "Failed to create NWL DSI regmap: %d\n", in nwl_dsi_parse_dt()
[all …]
DMakefile25 obj-$(CONFIG_DRM_NWL_MIPI_DSI) += nwl-dsi.o
Dnwl-dsi.h3 * NWL MIPI DSI host driver
/Linux-v5.10/drivers/pci/controller/
DKconfig26 bool "NWL PCIe Core"
31 NWL PCIe controller. The controller can act as Root Port
DMakefile15 obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
Dpcie-xilinx-nwl.c3 * PCIe host controller driver for NWL PCIe Bridge
802 { .compatible = "xlnx,nwl-pcie-2.11", },
856 .name = "nwl-pcie",
/Linux-v5.10/drivers/gpu/drm/imx/dcss/
Ddcss-drv.c48 hdmi_output = !of_device_is_compatible(remote, "fsl,imx8mq-nwl-dsi"); in dcss_drv_platform_probe()
/Linux-v5.10/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi525 compatible = "xlnx,nwl-pcie-2.11";
/Linux-v5.10/arch/arm64/boot/dts/freescale/
Dimx8mq.dtsi910 compatible = "fsl,imx8mq-nwl-dsi";