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/Linux-v6.1/Documentation/devicetree/bindings/mux/
Dmux-consumer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
[all …]
Dmux-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 A multiplexer (or mux) controller will have one, or several, consumer devices
14 that uses the mux controller. Thus, a mux controller can possibly control
16 multiplexer needed by each consumer, but a single mux controller can of course
19 A mux controller provides a number of states to its consumers, and the state
20 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
[all …]
Dreg-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller bindings
10 - Peter Rosin <peda@axentia.se>
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
24 '#mux-control-cells':
27 mux-reg-masks:
[all …]
Dadi,adg792a.txt4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.yaml
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
Dgpio-mux.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller bindings
10 - Peter Rosin <peda@axentia.se>
22 const: gpio-mux
24 mux-gpios:
28 '#mux-control-cells':
31 '#mux-state-cells':
[all …]
/Linux-v6.1/drivers/mux/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
10 #define pr_fmt(fmt) "mux-core: " fmt
19 #include <linux/mux/consumer.h>
20 #include <linux/mux/driver.h>
26 * The idle-as-is "state" is not an actual state that may be selected, it
33 * struct mux_state - Represents a mux controller state specific to a given
35 * @mux: Pointer to a mux controller.
36 * @state: State of the mux to be selected.
42 struct mux_control *mux; member
47 .name = "mux",
[all …]
/Linux-v6.1/drivers/clk/ti/
Dmux.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
23 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
35 val &= mux->mask; in ti_clk_mux_get_parent()
37 if (mux->table) { in ti_clk_mux_get_parent()
41 if (mux->table[i] == val) in ti_clk_mux_get_parent()
43 return -EINVAL; in ti_clk_mux_get_parent()
[all …]
/Linux-v6.1/drivers/iio/multiplexer/
Diio-mux.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/mux/consumer.h>
29 struct mux { struct
40 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
42 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
43 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
47 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
48 mux->delay_us); in iio_mux_select()
50 mux->cached_state = -1; in iio_mux_select()
54 if (mux->cached_state == chan->channel) in iio_mux_select()
[all …]
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mux.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
18 #include "clk-mux.h"
35 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local
38 if (mux->lock) in mtk_clk_mux_enable_setclr()
39 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_enable_setclr()
41 __acquire(mux->lock); in mtk_clk_mux_enable_setclr()
43 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr()
44 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr()
48 * not be effective yet. Set the update bit to ensure the mux gets in mtk_clk_mux_enable_setclr()
[all …]
Dclk-cpumux.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
7 #include <linux/clk-provider.h>
15 #include "clk-mtk.h"
16 #include "clk-cpumux.h"
33 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_get_parent() local
36 regmap_read(mux->regmap, mux->reg, &val); in clk_cpumux_get_parent()
38 val >>= mux->shift; in clk_cpumux_get_parent()
39 val &= mux->mask; in clk_cpumux_get_parent()
46 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_set_parent() local
[all …]
/Linux-v6.1/drivers/i2c/muxes/
Di2c-mux-reg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/i2c-mux.h>
15 #include <linux/platform_data/i2c-mux-reg.h>
23 static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) in i2c_mux_reg_set() argument
25 if (!mux->data.reg) in i2c_mux_reg_set()
26 return -EINVAL; in i2c_mux_reg_set()
34 switch (mux->data.reg_size) { in i2c_mux_reg_set()
36 if (mux->data.little_endian) in i2c_mux_reg_set()
37 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
39 iowrite32be(chan_id, mux->data.reg); in i2c_mux_reg_set()
[all …]
Di2c-mux-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/i2c-mux.h>
11 #include <linux/platform_data/i2c-mux-gpio.h>
26 static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val) in i2c_mux_gpio_set() argument
32 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
37 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_select() local
39 i2c_mux_gpio_set(mux, chan); in i2c_mux_gpio_select()
46 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_deselect() local
48 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
53 static int i2c_mux_gpio_probe_fw(struct gpiomux *mux, in i2c_mux_gpio_probe_fw() argument
[all …]
Di2c-mux-mlxcpld.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
3 * Mellanox i2c mux driver
5 * Copyright (C) 2016-2020 Mellanox Technologies
10 #include <linux/i2c-mux.h>
18 /* mlxcpld_mux - mux control structure:
19 * @last_val - last selected register value or -1 if mux deselected
20 * @client - I2C device client
29 /* MUX logic description.
30 * Driver can support different mux control logic, according to CPLD
35 * i2c-mlxcpld Digital Analog
[all …]
Di2c-mux-gpmux.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-mux.h>
13 #include <linux/mux/consumer.h>
17 struct mux { struct
25 struct mux *mux = i2c_mux_priv(muxc); in i2c_mux_select() local
28 ret = mux_control_select(mux->control, chan); in i2c_mux_select()
29 mux->do_not_deselect = ret < 0; in i2c_mux_select()
36 struct mux *mux = i2c_mux_priv(muxc); in i2c_mux_deselect() local
38 if (mux->do_not_deselect) in i2c_mux_deselect()
41 return mux_control_deselect(mux->control); in i2c_mux_deselect()
[all …]
/Linux-v6.1/sound/soc/codecs/
Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
89 * Default TAS5086 power-up configuration
173 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
[all …]
Drt5665.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver
27 #include <sound/soc-dapm.h>
888 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
889 static const DECLARE_TLV_DB_SCALE(mono_vol_tlv, -1400, 150, 0);
890 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
891 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
892 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
893 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
895 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
[all …]
Drt5677.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677.c -- RT5677 ALSA SoC audio codec driver
31 #include <sound/soc-dapm.h>
37 #include "rt5677-spi.h"
554 * rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode.
565 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_write_addr()
568 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr()
570 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_write_addr()
573 dev_err(component->dev, "Failed to set addr msb value: %d\n", ret); in rt5677_dsp_mode_i2c_write_addr()
577 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_write_addr()
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dnuvoton-wpcm450.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,arm926ej-s";
33 clk24m: clock-24mhz {
35 compatible = "fixed-clock";
36 clock-frequency = <24000000>;
[all …]
/Linux-v6.1/include/linux/mux/
Ddriver.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mux/driver.h - definitions for the multiplexer driver interface
13 #include <dt-bindings/mux/mux.h>
22 * struct mux_control_ops - Mux controller operations for a mux chip.
23 * @set: Set the state of the given mux controller.
26 int (*set)(struct mux_control *mux, int state);
30 * struct mux_control - Represents a mux controller.
31 * @lock: Protects the mux controller state.
32 * @chip: The mux chip that is handling this mux controller.
33 * @cached_state: The current mux controller state, or -1 if none.
[all …]
/Linux-v6.1/drivers/clk/
Dclk-mux.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
10 #include <linux/clk-provider.h>
21 * prepare - clk_prepare only ensures that parents are prepared
22 * enable - clk_enable only ensures that parents are enabled
23 * rate - rate is only affected by parent switching. No clk_set_rate support
24 * parent - parent is adjustable through clk_set_parent
27 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
30 return ioread32be(mux->reg); in clk_mux_readl()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dmdio-mux-multiplexer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-multiplexer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
14 of a mux producer device. The mux producer can be of any type like mmio mux
15 producer, gpio mux producer or generic register based mux producer.
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: mdio-mux-multiplexer
[all …]
/Linux-v6.1/Documentation/i2c/
Di2c-topology.rst6 than a straight-forward I2C bus with one adapter and one or more devices.
10 1. A mux may be needed on the bus to prevent address collisions.
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
28 Depending of the particular mux driver, something happens when there is
29 an I2C transfer on one of its child adapters. The mux driver can
30 obviously operate a mux, but it can also do arbitration with an external
31 bus master or open a gate. The mux driver has two operations for this,
40 mux-locked or parent-locked muxes.
43 Mux-locked muxes
44 ----------------
[all …]
/Linux-v6.1/include/dt-bindings/clock/
Dtegra186-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
384 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S2 */
386 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_I2S3 */
388 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPDF_IN */
392 /** @clkdesc{spi_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_SPI3} */
394 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C1} */
396 /** @clkdesc{i2c_clks, out, mux, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5} */
398 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_SPI1 */
400 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_ISP */
402 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_VI */
[all …]
Dtegra234-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
12 /** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AHUB */
16 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_APE */
18 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_AUD_MCLK */
20 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC1 */
22 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC2 */
24 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC3 */
26 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DMIC4 */
28 /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_DSPK1 */
[all …]
/Linux-v6.1/drivers/clk/qcom/
Dclk-krait.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
13 #include <asm/krait-l2-accessors.h>
15 #include "clk-krait.h"
23 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
30 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel()
33 if (mux->disable_sec_src_gating) { in __krait_mux_set_sel()
35 krait_set_l2_indirect_reg(mux->offset, regval); in __krait_mux_set_sel()
38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel()
39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
[all …]

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